SRAM_DPA2 | PIN_AK20 | SRAM Parity Data[2] |
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SRAM_DPA3 | PIN_AJ9 | SRAM Parity Data[3] |
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SRAM_GW_N | PIN_AG18 | SRAM Global Write Enable |
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SRAM_OE_N | PIN_AD18 | SRAM Output Enable |
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SRAM_WE_N | PIN_AF18 | SRAM Write Enable |
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| Table 5.20. SSRAM pin assignments. | |
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Signal Name | FPGA Pin No. | Description |
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FLASH_A[0] | PIN_AF24 | FLASH Address[0] |
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FLASH_A[1] | PIN_AG24 | FLASH Address[1] |
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FLASH_A[2] | PIN_AE23 | FLASH Address[2] |
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FLASH_A[3] | PIN_AG23 | FLASH Address[3] |
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FLASH_A[4] | PIN_AF23 | FLASH Address[4] |
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FLASH_A[5] | PIN_AG22 | FLASH Address[5] |
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FLASH_A[6] | PIN_AH22 | FLASH Address[6] |
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FLASH_A[7] | PIN_AF22 | FLASH Address[7] |
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FLASH_A[8] | PIN_AH27 | FLASH Address[8] |
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FLASH_A[9] | PIN_AJ27 | FLASH Address[9] |
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FLASH_A[10] | PIN_AH26 | FLASH Address[10] |
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FLASH_A[11] | PIN_AJ26 | FLASH Address[11] |
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FLASH_A[12] | PIN_AK26 | FLASH Address[12] |
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FLASH_A[13] | PIN_AJ25 | FLASH Address[13] |
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FLASH_A[14] | PIN_AK25 | FLASH Address[14] |
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FLASH_A[15] | PIN_AH24 | FLASH Address[15] |
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FLASH_A[16] | PIN_AG25 | FLASH Address[16] |
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FLASH_A[17] | PIN_AF21 | FLASH Address[17] |
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FLASH_A[18] | PIN_AD21 | FLASH Address[18] |
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FLASH_A[19] | PIN_AK28 | FLASH Address[19] |
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FLASH_A[20] | PIN_AJ28 | FLASH Address[20] |
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FLASH_A[21] | PIN_AE20 | FLASH Address[21] |
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FLASH_DQ[0] | PIN_AF29 | FLASH Data[0] |
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FLASH_DQ[1] | PIN_AE28 | FLASH Data[1] |
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FLASH_DQ[2] | PIN_AE30 | FLASH Data[2] |
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FLASH_DQ[3] | PIN_AD30 | FLASH Data[3] |
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FLASH_DQ[4] | PIN_AC29 | FLASH Data[4] |
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| 64 |
