Configuring the FPGA in JTAG Mode
Figure 5.1 illustrates the JTAG configuration setup. To download a configuration bit stream into the Cyclone II FPGA, perform the following steps:
•Ensure that power is applied to the DE2-70 board
•Connect the supplied USB cable to the USB Blaster port on the DE2-70 board (see Figure 2.1)
•Configure the JTAG programming circuit by setting the RUN/PROG switch (on the left side of the board) to the RUN position.
•The FPGA can now be programmed by using the Quartus II Programmer module to select a configuration bit stream file with the .sof filename extension
USB Blaster Circuit
Quartus II | USB |
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EPCS16
Serial
Configuration
Device
FPGA
Figure 5.1. The JTAG configuration scheme.
Configuring the EPCS16 in AS Mode
Figure 5.2 illustrates the AS configuration set up. To download a configuration bit stream into the EPCS16 serial EEPROM device, perform the following steps:
•Ensure that power is applied to the DE2-70 board
•Connect the supplied USB cable to the USB Blaster port on the DE2-70 board (see Figure 2.1)
•Configure the JTAG programming circuit by setting the RUN/PROG switch (on the left side of the board) to the PROG position.
•The EPCS16 chip can now be programmed by using the Quartus II Programmer module to select a configuration bit stream file with the .pof filename extension
•Once the programming operation is finished, set the RUN/PROG switch back to the RUN
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