Sigma DE2-70 manual TV Decoder

DE2-70 User Manual

ENET_CS_N	PIN_C28	DM9000A Chip Select
ENET_INT	PIN_C27	DM9000A Interrupt
ENET_IOR_N	PIN_A28	DM9000A Read
ENET_IOW_N	PIN_B28	DM9000A Write
ENET_RESET_N	PIN_B29	DM9000A Reset

Table 5.15. Fast Ethernet pin assignments.

5.12 TV Decoder

The DE2-70 board is equipped with two Analog Devices ADV7180 TV decoder chips. The ADV7180 is an integrated video decoder that automatically detects and converts a standard analog baseband television signal (NTSC, PAL, and SECAM) into 4:2:2 component video data compatible with the 8-bit ITU-R BT.656 interface standard. The ADV7180 is compatible with a broad range of video devices, including DVD players, tape-based sources, broadcast sources, and security/surveillance cameras.

The registers in both of the TV decoders can be programmed by a serial I2C bus, which is connected to the Cyclone II FPGA as indicated in Figure 5.18. Note that the I2C address of the TV decoder 1(U11) and TV decoder 2(U12) are 0x40 and 0x42 respectively. The pin assignments are listed in Table 5.16. Detailed information on the ADV7180 is available on the manufacturer’s web site, or in the Datasheet/TV Decoder folder on the DE2-70 System CD-ROM.

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