Specifications
TDS5000B Series Specificationsand Performance Verification 1-17
Table1- 4: Trigger specifications (Cont.)
Characteristic Description
Widthtype Minimumdifference
between upperand l ower
limits= 1 ns
2ns + 5% of upper limit
setting
Timeout type Minimum timeout time =
1ns
2ns + 5% of tim eout set-
ting
Transitiontype Minimumtransition time =
600ps
8.5 ns+ 5% of transit ion
timesetting
Patterntype, typical Minimumtime the pattern is
true= 1 ns
1ns
Logic Not applicable 1ns
Events Delay 1ns (single channel) Notapplicable
State type, typical Minimumtrue time before
clock edge = 1 ns
Minimumtrue time after
clock edge = 1 ns
1ns
Setup/Hold type, typical Minimumclock pulse width
from active edge to inactive
edge
Minimumclock pulse width
from inactive edge to active
edge
3ns + hol d time setting 2ns
Setup and Hold parameters Limits
Setuptime (time from data
transition to clock edge)
--100ns minimum
+100ns m aximum
Holdtime (time from clock
edget o data transition)
--1ns minimum
+102ns m aximum
Setuptime + Hold time
(algebraicsum of the two
settings)
+2ns minimum
+202ns m aximum