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Overview

uses the corresponding estimates from the other decoder as a priori likelihood. The a priori information is seen as beforehand knowledge, meaning that some messages are more likely to occur than others. A posteriori information adds to the a priori information the knowledge gained by the decoding.

The uncoded information bits (corrupted by the noisy channel) are available to each decoder to initialize the a priori likelihoods. The decoders use the Maximum a Posteriori (MAP) bitwise decoding algorithm that requires the same number of states as the well known Viterbi algorithm. The turbo decoder iterates between the outputs of the two constituent decoders until it reaches satisfactory convergence. The final output is a hard-quantized version of the likelihood estimates of the decoders.

Figure 2. 3GPP and IS2000 Turbo-Decoder Block Diagram

Decoded bits

 

Hard

 

 

 

decisions

 

 

 

calculation

 

 

 

A priori

 

 

 

information

Deinterleave

 

 

 

 

 

 

 

A priori

 

Received parities

 

information

 

A & B symbols

Interleave

MAP2

 

MAP1

 

Received systematics

 

 

 

X symbols

 

 

 

Received parities A’ & B ’ symbols

Received systematics

 

 

 

X’ symbols

 

 

Interleave

 

3

Overview

 

 

The DSP controls the operation of the TCP2 (Figure 3) using memory-mapped registers. The DSP typically sends and receives data using synchronized EDMA3 transfers through the 64-bit EDMA3 bus. The TCP2 sends two synchronization events to the EDMA3: a receive event (TCPREVT) and a transmit event (TCPXEVT).

The processing unit can implement the Max*-Log-MAP or Max-Log-MAP approximations of the BCJR algorithm and is selected with the E_MAX_STAR bit of the TCPIC3 register. (See L. R. Bahl, J. Cocke, F. Jelinek, and J. Raviv, "Optimal decoding of linear codes for minimizing symbol error rate",. IEEE Trans. Inform.Theory, vol. IT.20, pp. 284.287, Mar. 1974 and P. Robertson, E. Villebrun, and P. Hoeher, "A comparison of optimal and sub-optimal MAP decoding algorithms operating in the log domain", in Proc. 1996 IEEE Int. Conf. on Communications (Seattle, WA), June 1995, vol. 2, pp. 1009-1013.)

The TCP2 has two fundamental modes: standalone (SA) and shared processing (SP).

In SA mode, the TCP2 iterates a given number of times and outputs hard decisions. In SP mode, the TCP2 executes a single MAP decode and outputs extrinsic information (soft information). SA mode is typically used for frame sizes up to 20730. SP mode must be used for frames strictly larger than 20730. Table 1 describes which mode to use depending on the frame size.

The TCP2 input data corresponds to channel log-likelihood ratios scaled on 6 bits, while the TCP2 output data to hard-decisions (SA mode) or extrinsics (SP mode) scaled on 7 bits.

SPRUGK1–March 2009

TMS320C6457 Turbo-Decoder Coprocessor 2

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Texas Instruments TMS320C6457 DSP manual Overview, GPP and IS2000 Turbo-Decoder Block Diagram