Registers

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6.12 TCP2 Input Configuration Register 9 (TCPIC9)

The TCP2 input configuration register 9 (TCPIC9) is shown in Figure 42 and described in Table 16. TCPIC9 sets the tail bits used by the TCP.

Figure 42. CP2 Input Configuration Register 9 (TCPIC9)

31

18

17

0

 

Reserved

 

TAIL4

 

R/W-0

 

R/W-0

LEGEND: R/W = Read/Write; R = Read only; -n= value after reset

Table 16. CP2 Input Configuration Register 9 (TCPIC9) Field Descriptions

Bit

Field

Value

Description

31-18

Reserved

0

Reserved. The reserved bit location is always read as 0. A value written to this field has

 

 

 

no effect.

17-0

TAIL4

0-FFFF FFFFh

Tail bit. Values must be set as in the following list.

CDMA-2000 Tail Symbol Pattern for Code Rate 1/5

tail+2

tail+1

tail+0

(x20+x20+x20)/3(x20+x20+x20)/3 (x20+x20+x20)/3

CDMA-2000 Tail Symbol Pattern for Code Rate 1/4, 1/3

tail+2

tail+1

tail+0

(x20+x20)/2

(x20+x20)/2

(x20+x20)/2

CDMA-2000 Tail Symbol Pattern for Code Rate 1/2 or 3/4

tail+2

tail+1

tail+0

x20

x20

x20

CDMA-2000 Tail Symbol Pattern for Code Rate 1/5 or 1/4

tail+2

tail+1

tail+0

x20

x20

x20

CDMA-2000 Tail Symbol Pattern for Code Rate 1/3, 1/2, or 3/4

tail+2

tail+1

tail+0

x20

x20

x20

36

TMS320C6457 Turbo-Decoder Coprocessor 2

SPRUGK1–March 2009

 

 

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Texas Instruments TMS320C6457 DSP manual 12 TCP2 Input Configuration Register 9 TCPIC9, TAIL4