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6.12 TCP2 Input Configuration Register 9 (TCPIC9)
The TCP2 input configuration register 9 (TCPIC9) is shown in Figure 42 and described in Table 16. TCPIC9 sets the tail bits used by the TCP.
Figure 42. CP2 Input Configuration Register 9 (TCPIC9)
31 | 18 | 17 | 0 |
| Reserved |
| TAIL4 |
|
|
LEGEND: R/W = Read/Write; R = Read only;
Table 16. CP2 Input Configuration Register 9 (TCPIC9) Field Descriptions
Bit | Field | Value | Description |
Reserved | 0 | Reserved. The reserved bit location is always read as 0. A value written to this field has | |
|
|
| no effect. |
TAIL4 | Tail bit. Values must be set as in the following list. |
∙
tail+2 | tail+1 | tail+0 |
(x20+x20+x20)/3(x20+x20+x20)/3 (x20+x20+x20)/3
∙
tail+2 | tail+1 | tail+0 |
(x20+x20)/2 | (x20+x20)/2 | (x20+x20)/2 |
∙
tail+2 | tail+1 | tail+0 |
x20 | x20 | x20 |
∙
tail+2 | tail+1 | tail+0 |
x20 | x20 | x20 |
∙
tail+2 | tail+1 | tail+0 |
x20 | x20 | x20 |
36 | TMS320C6457 | |
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