Errors and Status | www.ti.com |
13.1.2Unexpected Frame Length: F
The F bit is set to 1 if the programmed frame length is strictly smaller than 40 or is strictly greater than 20730 for standalone mode.
The F bit is set to 1 if the programmed frame length has the following values for shared processing mode:
1.Frame length < 256 or frame length > 20480 or (frame length)%256 != 0 if opmode = 1 or 2.
2.Frame length < 128 or frame length > 20480 if opmode = 3.
13.1.3Unexpected Prolog Length: P
The P bit is set to 1 if the specified prolog length is strictly greater than 48. Values smaller than 4 are ignored by the hardware and 24 is used.
13.1.4Unexpected Subframe Length: SF
The SF bit is set to 1 if the specified subframe length is strictly greater than 20480 in shared processing mode.
13.1.5Unexpected Reliability Length: R
The R bit is set to 1 if the specified reliability length minus 1 is strictly smaller than 40 or greater than 128 in SA mode.
The R bit is set to 1 if the specified reliability length is not equal to 128 in SP mode if opmode = 1 or 2.
The R bit is set to 1 if the specified reliability length is less than 65 in SP mode if opmode = 3.
13.1.6Unexpected Signal to Noise Ratio: SNR
The SNR bit is set to 1 if the signal to noise ratio threshold is greater than 100.
13.1.7Unexpected Interleaver Table Load: INT
The INT bit is set to 1 if loading an interleaver table has been requested in SP mode.
13.1.8Unexpected Output Parameters Load: OP
The OP bit is set to 1 if loading the output parameters has been requested in SP mode.
13.1.9Unexpected Memory Access: ACC
The ACC bit is set to 1 when an unexpected memory access occurs. This can be used to spot any EDMA3 programming issues. This can occur when:
∙TCP2 is waiting for input configuration parameters state and memory access to any TCP2 memory but the interleaver memory is performed
∙TCP2 is waiting for systematics and parities state and memory access to any TCP2 memory other than the TCPINTER memory
∙TCP2 is waiting for a prioris state and memory access to any TCP2 memory other than the TCPAP memory
∙TCP2 is waiting for extrinsics state and memory access to any TCP2 memory other than the TCPEXT memory
∙TCP2 is waiting for hard decisions state and memory access to any TCP2 memory other than the TCPHD memory
∙TCP2 is waiting for output parameters state and memory access to any TCP2 memory
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