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List of Figures

 

 

1

3GPP and IS2000 Turbo-Encoder Block Diagram

10

2

3GPP and IS2000 Turbo-Decoder Block Diagram

11

3

TCP2 Block Diagram

12

4

Standalone (SA) Mode Block Diagram

13

5

Systematic/Parity Data for Rates 1/2, 1/3, 1/4, 1/5, and 3/4

14

6

EN = 1 (Little-Endian Mode) Rate = 1/2

14

7

EN = 0 (Big-Endian Mode) Rate = 1/2

14

8

EN = 1 (Little-Endian Mode) Rate = 1/3

14

9

EN = 0 (Big-Endian Mode) Rate = 1/3

14

10

EN = 1 (Little-Endian Mode) Rate = 1/4

14

11

EN = 0 (Big-Endian Mode) Rate = 1/4

15

12

EN = 1 (Little-Endian Mode) Rate = 1/5

15

13

EN = 0 (Big-Endian Mode) Rate = 1/5

15

14

EN = 1 (Little-Endian Mode) Rate = 3/4

15

15

Rate 3/4 EN = 0 (Big-Endian Mode) Rate = 3/4

16

16

Shared-Processing (SP) Mode Block Diagram

19

17

Subframe Equations

20

18

Frame Process

20

19

TCP2 Shared Processing Block Diagram

22

20

Systematic/Parity Data for Rates 1/2, 1/3, 1/4, 1/5, and 3/4

22

21

EN = 1 (Little-Endian Mode) Rate = 1/2

22

22

EN = 0 (Big-Endian Mode) Rate = 1/2

22

23

EN = 1 (Little-Endian Mode) Rate = 1/3

23

24

EN = 0 (Big-Endian Mode) Rate = 1/3

23

25

EN = 1 (Little-Endian Mode) Rate = 1/4

23

26

EN = 0 (Big-Endian Mode) Rate = 1/4

23

27

EN = 1 (Little-Endian Mode) Rate = 1/5

23

28

EN = 0 (Big-Endian Mode) Rate = 1/5

24

29

EN = 1 (Little-Endian Mode) Rate = 3/4

24

30

Rate 3/4 EN = 0 (Big-Endian Mode) Rate = 3/4

24

31

A Priori Data

24

32

Peripheral Identification Register (PID)

27

33

TCP2 Input Configuration Register 0 (TCPIC0)

28

34

TCP2 Input Configuration Register 1 (TCPIC1)

29

35

TCP2 Input Configuration Register 2 (TCPIC2)

29

36

TCP2 Input Configuration Register 3 (TCPIC3)

30

37

TCP2 Input Configuration Register 4 (TCPIC4)

31

38

TCP2 Input Configuration Register 5 (TCPIC5)

32

39

TCP2 Input Configuration Register 6 (TCPIC6)

33

40

TCP2 Input Configuration Register 7 (TCPIC7)

34

41

TCP2 Input Configuration Register 8 (TCPIC8)

35

42

CP2 Input Configuration Register 9 (TCPIC9)

36

43

TCP2 Input Configuration Register 10 (TCPIC10)

37

44

TCP2 Input Configuration Register 11 (TCPIC11)

38

45

TCP2 Input Configuration Register 12 (TCPIC12)

39

46

TCP2 Input Configuration Register 13 (TCPIC13)

39

47

TCP2 Input Configuration Register 14 (TCPIC14)

40

48

TCP2 Input Configuration Register 15 (TCPIC15)

41

49

TCP2 Output Parameter Register 0 (TCPOUT0)

42

50

TCP2 Output Parameter Register 1 (TCPOUT1)

42

51

TCP2 Output Parameter Register 2 (TCPOUT2)

43

52

TCP2 Execution Register (TCPEXE)

43

SPRUGK1–March 2009

List of Figures

5

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Texas Instruments TMS320C6457 DSP manual List of Figures