User's Guide

SPRUGK1–March 2009

TMS320C6457 Turbo-Decoder Coprocessor 2

Channel decoding of high bit-rate data channels found in third-generation (3G) cellular standards requires decoding of turbo-encoded data. The turbo-decoder coprocessor (TCP2) in some of the digital signal processor (DSPs) of the TMS320C6000E DSP family has been designed to perform this operation for IS2000 and 3GPP wireless standards. This document describes the operation and programming of the TCP2.

1Features

The TCP2 provides:

High performance:

Very-low-processing delay because of the highly paralleled architecture allowing 8 iterations of a 2 Mbps 3GPP channel to be decoded in less than 1.2 ms and an IS2000 channel in less than 1.2 ms.

Processing delay can be further reduced by enabling a stopping criteria algorithm while achieving optimal BER performance.

TCP2 and the DSP can run full speed in parallel.

System cost optimization:

Reduces board space and power consumption by performing on-chip turbo-decoding.

Communication between the DSP and the TCP2 is performed through a high performance DMA engine, the enhanced DMA (EDMA3).

TCP2 uses its own optimized memories, reducing system memory overhead and yielding higher overall performance.

Increased programmability.

Power efficient and module power-saver capabilities.

High flexibility to cope with standard evolutions:

Accepts all IS2000, 3GPP rates, and polynomials.

Accepts any frame length from 40 (3GPP minimum frame size) up to 20730 for standalone processing. Frame sizes greater than 20730 can be processed by breaking them up into smaller subframes for processing in shared processing mode.

Supports all interleaver combinations via interleaver table.

Frees-up DSP resources.

Improvements over TCP:

Standalone mode frame length increased from 5114 to 20730.

Code rates 1/2,1/3,1/4 and 1/5 (other rates via de-puncturing may be achieved).

Prolog reduction.

Cyclic redundancy check (CRC) stopping criteria.

Channel re-encoding.

Max-Log Maximum a Posteriori (MAP) option added to TCP2 (Max*-Log MAP still available).

Input sign programmable.

Debug mode added to allow pausing after each MAP.

Decision ordering programmable as MSB first or LSB first.

Extrinsic scaling added for Max-Log MAP.

SPRUGK1–March 2009

TMS320C6457 Turbo-Decoder Coprocessor 2

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Texas Instruments TMS320C6457 DSP manual TMS320C6457 Turbo-Decoder Coprocessor, Features