2 Introduction
z−1 z−1
z−1
B
A
X
z−1 z−1
z−1
B’
A’
X’
Interleaver
Puncture
and
repetition
X
P1
P2
P3
Information
Switches in upper position for information bits and in lower position for tail bits
Introduction
www.ti.com
Encoding is done as shown in Figure 1 . The 3GPP and IS2000 turbo encoders employ two recursive,systematic, convolutional (RSC) encoders connected in parallel, with an interleaver (the turbo interleaver)preceding the second recursive convolutional encoder. The two recursive convolutional codes are calledthe constituent encoders of the turbo code and have a constraint length K = 4.
Figure 1. 3GPP and IS2000 Turbo-Encoder Block Diagram
The outputs of the constituent encoders are punctured and repeated (F denotes the frame size, X and X'are systematic data, A, B, A', and B' are parity data, X', A', and B' are the interleaved versions of X, A, andB data):
•Data rate 1/2 (2 ×Fbits):X
0
A
0
X
1
A'
1
X
2
A
2
X
3
A'
3
…
•Data rate 1/3 (3 ×Fbits):X
0
A
0
A'
0
X
1
A
1
A'
1
X
2
A
2
A'
2
X
3
A
3
A'
3
…
•Date rate 1/4 (4 ×Fbits):X
0
A
0
B
0
B'
0
X
1
A
1
A'
1
B'
1
X
2
A
2
B
2
B'
2
X
3
A
3
A'
3
B'
3
…
For the tail bits, the sequence is:
•IS2000 tail rate 1/2 and 3GPP tail rate 1/3: 12 bitsX
F
A
F
X
F+1
A
F+1
X
F+2
A
F+2
X'
F
A'
F
X'
F+1
A'
F+1
X'
F+2
A'
F+2
•IS2000 tail rate 1/3: 18 bits (systematic bit repeated twice)X
F
X
F
A
F
X
F+1
X
F+1
A
F+1
X
F+2
X
F+2
A
F+2
X'
F
X'
F
A'
F
X'
F+1
X'
F+1
A'
F+1
X'
F+2
X'
F+2
A'
F+2
•IS2000 tail rate 1/4: 24 bits (systematic bit repeated twice)X
F
X
F
A
F
B
F
X
F+1
X
F+1
A
F+1
B
F+1
X
F+2
X
F+2
A
F+2
B
F+2
X'
F
X'
F
A'
F
B'
F
X'
F+1
X'
F+1
A'
F+1
B'
F+1
X'
F+2
X'
F+2
A'
F+2
B'
F+2
The decoding process is an iterative algorithm based on simple decoders individually matched to theRSC codes. A generic 3GPP and IS2000 turbo decoder is shown in Figure 2 .
Each decoder sends a posteriori likelihood estimates of the decoded bits to the other decoder, and
10 TMS320C6457 Turbo-Decoder Coprocessor 2 SPRUGK1 – March 2009Submit Documentation Feedback