CRT and Ca~M,tte Code (Cont'd)

II

II:~

!S!'~-II·313S€l/:?0S5 ASSEMBLEP.

31385 SEPIAl T/O NOTE HPPE~IDI:":

LOC

08,.1

SEa

eS2F 87

!54

~81e

F22708

55

 

 

56

138B

E5

57

13814

24

5e

1383:5

2C

59

eS?6

22C829

69

0829 E1

£1

e8ZA B7

62

13838

7C

6:?

eS3e

1F

64

1383:[1

t·;'

65

e81E

70

66

138?F

iF

67

e94fl

!SF

f,:~:

0341

24

69

13842

:":

70

ee4?

22(A2e

71

0046

C9

72

Vi I~

MODl!Lg',ii::~;l:'~'

PAGE

 

~;

":"" '

 

SOURCE STATEMENT

,'.

 

ORA

A

 

 

JP

eRE

;<Hi.> ~lO~l CORRESPON[iS TO INCOMING DATA RATE

PIJSH

 

H

::':AVE COUNT FOP. HALFBIT TIriE COMPIJTATION

IHR

H

; eITn~lE IS [iETEP.tlINEO B~' !NCRENE~mNG

H~

L

,: \ HAND L nmI'JWUALLY

 

SHL[:O

B!TTIt'!E

 

POP

H

. PESTOPE COUNT FOR HALFBIT CHERllINFtTION

ORA

A

; CLEAF.: CARRY

 

NOV

Ft.. H: ROTATE RIGHT E::-~THl[:t£D

<:HL>

PAl"'

 

, '.TO ['!\,;!OECOIJNT B'~ 2

"lOll

HA

 

 

~10V

A·L

 

 

PAR

 

 

 

~101J

LA

 

 

!NR

H

: PUT H fiNO L HI PROPER FOR~1HT FOR DELAY

INP.

L

,:"" SEGI'lENTS (: HKRE~lE~IT EACH::'

SHlP

HALFEIT; SA'·iEAS HflLF-BIT TUlE DELAY PARAMETER

PET

 

 

 

I, I':I

I

7~:

0847 21'55tl8

084A 4E e84B AF

eNC 81

8S4[i ce

1384E CD69ge

ee51 2:

13852 C?4AA'?

tiPS,) aD

e~5£ eH

0857 42415~-44

0:?58 213524154

eE~'5F 452-34~:48

138t.~ 454148 ~3:?'65 0(1

ee67 13A

0868 013

0869 F1

9BbA C5 0868 ES

08£C 06£18

086E AF e86F ZE80

0871 iF

0872 :e

0S71 2At82e

0876 2D

74 ,SIGt-IONHF.'IT£SA SIGN-ON t'lESSAGE TO THE CRT AT WHAT SHOIJLD BE THE CORRECT RATE.

7'5;

IF THE

~lESSHGE

IS UNINTELLIGIBLE.

WELL. SO IT

GOES.

76

SIGNON'

L:"I

HI '::TRNG· ; LOAD START OF SIGN-ON MESSAGE

 

.,.,

51

1'10\,1

C.. M

.' GET NEi~T CHARACTER

 

 

,'i

 

 

78

 

:,:RR

A

.CLEAR ACC'-~1fJLATOR

 

 

79

 

')RA

C

.: CHEO': IF CHAF.:ACTER IS END OF STRING

!:'(!

 

t:..,

 

.: PETUPN IF 5IGN-(ltl COt~PLETE

 

 

.,.;.

 

 

:31

 

CAl.L

COUi

, ELSE cmpUT CHARACTER TO CPT

 

:::2

 

IN:-:

H; INI)£>~ Pi) INTEF.:

 

 

S1:

 

HiP

51

; ECH;J NE~T CHAP-ACTER

 

 

84

 

 

 

 

 

 

:35

STRNlj'

('8

f(IH. 0AH

; <CR><LF}

 

 

!?6

 

DE:

'BAUC'PATE CHECK·'

 

 

:::7

 

oe

 

 

 

 

 

 

 

(tI)H

,HlO-(lF-STRING ESCAPE e(!(iE

 

89

 

 

 

 

 

 

ge

,: COUT

CONSOLE OUTPUT

SUBROUTINE

 

 

9'1 :

WPITES THE CONTENTS OF THE C REGISTER TO THE CRT OISPLAY SCREEN

92

COIJT

C'l

 

 

 

 

?3:

 

PUSH

E:

 

 

 

94

 

PUSH

H

 

 

 

95

 

t·W!

8, BITSO

.. SET t'U'1BEP OF BITS TO BE TRANSMITTED

96

 

;,":RA

A

,; CLEAF: CAF.:R'T'

 

 

97

COl

W·:'l

A.. SOH

,SEi ~lHAT HILL BECOI'IESOC' E~lABLE

BIT

?8

 

PAP; "lI)VE CARP'r'INTO 50(.. rlATA BIT OF ACC

99

 

SIt-!

 

; OliTPUT CoRTA BIT TO SOD

 

lee

 

LHLC'

E'!TT!l4E

.d4AIT UNTIL APPROPR lATE TIriE HAS

PA55ECI

101 C02:

r,eR

L

A1-50

Page 190 Page 192
Page 191
Image 191
Intel MCS-80/85 manual 08,.1
Page 190 Page 192

MCS-80/85 specifications

The Intel MCS-80/85 family, introduced in the late 1970s, is a seminal collection of microprocessors that played a pivotal role in the early days of computing. The MCS-80 series, initially targeting embedded systems and control applications, gained remarkable attention due to its innovative architecture and flexible programming capabilities.

The MCS-80 family is anchored by the 8080 microprocessor, which was one of the first fully integrated 8-bit microprocessors. Released in 1974, the 8080 operated at clock speeds ranging from 2 MHz to 3 MHz and featured a 16-bit address bus capable of addressing up to 64KB of memory. The processor’s instruction set included around 78 instructions, providing extensive capabilities for data manipulation, logic operations, and branching.

Complementing the 8080 was a suite of support chips, forming the MCS-80 platform. The most notable among them was the 8155, which integrated a static RAM, I/O ports, and a timer, tailored for ease of designing systems around the 8080. Other support chips included the 8085, which provided improvements with an integrated clock generator, making it compatible with more modern designs and applications.

The MCS-85 series, on the other hand, revolves around the 8085 microprocessor, which provided a more advanced architecture. The 8085 operated at clock speeds of up to 6 MHz and came with a 16-bit address bus, similar to its predecessor. However, it introduced more sophisticated features, including an enhanced instruction set and support for interrupt-driven programming. These enhancements made the 8085 especially appealing to developers working in real-time processing environments.

The MCS-80/85 family utilized NMOS technology, known for its lower power consumption and higher performance compared to previous technologies like TTL. The family’s architecture allowed for easy interfacing with a variety of peripherals, making it a favorite for educational institutions and hobbyists embarking on computer engineering projects.

With its robustness, versatility, and affordability, the Intel MCS-80/85 microprocessors laid the groundwork for many subsequent microcomputer systems and applications. The legacy of this powerful family continues to influence modern microprocessor design, emphasizing the importance of reliable architecture in a rapidly evolving technology landscape.
Top Page Image Contents