Intel MCS-80/85 manual Status Bit Definitions

Instructions for the 8080 require from one to five machine cycles for complete execution. The 8080 sends out 8 bit of status information on the data bus at the beginn ing of each machine cycle (during SYNC time). The following table defines the status information.

	STATUS INFORMATION DEFINITION
	Data Bus
Symbols	Bit	Definition
INTA*	DO	Acknowledge signal for INTE R R UPT re-
		quest. Signal should be used to gate a re-
		start instruction onto the data bus when
		DBIN is active.
	Dl	Indicates that the operation in the current
		machine cycle will be a WR ITE memory
		or OUTPUT function (WO = 0). Otherwise,
		a READ memory or INPUT operation will
		be executed.
STACK	D2	Indicates that the address bus holds the
		pushdown stack address from the Stack
		Pointer.
HLTA	D3	Acknowledge signal for HALT instruction.
OUT	D4	Indicates that the address bus contains the
		address of an output device and the data
		bus will contain the output data when
		WR is active.
M,	D5	Provides a signal to indicate that the CPU
		is in the fetch cycle for the first byte of
		an instruction.
INP*	De	Indicates that the address bus contains the
		address of an input device and the input
		data should be placed on the data bus
		when DBIN is active.
MEMR*	D7	Designates that the data bus will be used
		for memory read data.

*These three status bits can be used to control the flow of data onto the 8080 data bus.

STATUS WORD CHART

/too 8080 STATUS LATCH

9

D,

D8

27

	D3	3
	D,
8080		4
	D5	5
	~!
		6

SYNC ~

,DBIN r22-

2

STATUS

22

15

LATCH

5

'

Do t--

--4-

D

~

~

------g

Ta-

r,s-

16

8212

'17""

18

20

~

:tt=

CLOCK GEN

I lTTLI

22

& DRIVER

~ g~; MO

OS,

13 12

'( 1

~

SYNC

ST A TUS f ------ f . J' ----- 1

TYPE OF MACHINE CYCLE

INTA

WD

STACK HLTA OUT M1 INP MEMR

DBIN

Do	INTA			000000010
	WO	1	1	0	1	0	1 0		1	1
	STACK	000			1	100			0	0	o
	HLTA	o	0	0	0	0	0	0	0	1
	OUT	o	0	000			0	1	0	0	o
		1	0	0	0	0	0	0	1	0
De	INP	o	0	000			1	000			o
	MEMR	110100001									o

Table 4-1. 8080 Status Bit Definitions

4-6