8085AH/8085AH-2/8085AH-1

NOTES:

3.

For all output timing where CL =f 150 pF use the following

1.

Aa-A15 address Specs apply 101M, SO'and Sl except Aa-A15

. correction factors:

 

are undefined during T4-Tsof OF cycle whereas 101M, SO, and

 

25 pF ~ CL < 150 pF: -0.10 ns/pF

 

Sl are stable.

 

150 pF < CL ~ 300 pF: +0.30 ns/pF

2.

Test Conditions: tCYC = 320 ns (8085AH)/200 ns (8085AH-2);/

4.

Output timings are measured with purely capacitive load.

 

167 ns (8085AH-1); CL = 150 pF.

5.

To calculate timing specifications at other values of tCYC use

 

 

 

Table 5.

A.C. TESTING INPUT, OUTPUT WAVEFORM

INPUT/OUTPUT

'.'=X2.0 >TEST POINTS <2.0 x=

0.80.8

0.45

A.C TESTING INPUTS ARE DRIVEN AT 2.4V FOR A LOGIC ,. AND 0.45V FOR A LOGIC 0 TIMING MEASUREMENTS ARE MADE AT 2.0V FOR A LOGIC , AND O.8V FOR A LOGIC 0

A.C. TESTING LOAD CIRCUIT

DEVICE

UNDER -r"

TEST

-=

CL 150 pF

CL INCLUDES JIG CAPACITANCE

150 pF

Table 5. Bus Timing Specification as a Teye Dependent

Symbol

8085AH

 

 

 

8085AH-2

8085AH-1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tAL

(1/2) T -

45

 

 

 

(1/2) T -

50

 

(1/2) T -

58

 

 

Minimum

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tlA

(1/2) T -

60

 

 

 

(1/2) T -

50

 

(1/2) T -

63

 

 

Minimum

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tLl

(1/2) T -

20

 

 

 

(1/2) T -

20

 

(1/2) T -

33

 

 

Minimum

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tlCK

(1/2) T -

60

 

 

 

(1/2) T -

50

 

(1/2) T -

68

 

 

Minimum

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tlC

(1/2) T -

30

 

 

 

(1/2) T -

40

 

(1/2) T -

58

 

 

Minimum

 

 

 

 

 

 

 

 

 

 

 

tAD

(5/2 + N) T -

225

 

 

(5/2 + N)T -150

(5/2 + N)T -192

 

Maximum

 

 

 

 

 

 

 

 

 

 

 

 

tRD

(3/2 + N) T -

180

 

 

(3/2 + N) T -

150

(3/2 + N)T -175

 

Maximum

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tRAE

(1/2) T -

10

 

 

 

(1/2) T -

10

 

(1/2) T -

33

 

 

Minimum

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tCA

(1/2) T -

40

 

 

 

(1/2) T -

40

 

(1/2) T -

53

 

 

Minimum

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tow

(3/2 + N) T -

60

 

 

(3/2 + N) T -

70

(3/2 + N) T -

110

 

Minimum

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

two

(1/2) T -

60

 

 

 

(1/2) T -

40

 

(1/2) T -

53

 

 

Minimum

 

 

 

 

 

 

 

 

 

 

 

 

 

tcc

(3/2 + N) T -

80

 

 

(3/2 + N) T -

70

(3/2 + N) T -

100

 

Minimum

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tCl

(1/2)T-110

 

 

 

(1/2) T -

75

 

(1/2) T -

83

 

 

Minimum

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tARY

(3/2) T -

260

 

 

 

(3/2) T -

200

 

(3/2) T -

210

 

 

Maximum

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tHACK

(1/2) T -

50

 

 

 

(1/2) T -

60

 

(1/2) T -

83

 

 

Minimum

 

 

 

 

 

 

 

 

 

 

 

 

 

tHABF

(1/2) T + 50

 

 

 

(1/2) T + 50

 

(1/2) T + 67

 

 

Maximum

 

 

 

 

 

 

 

 

 

 

 

 

 

tHABE

(1/2) T + 50

 

 

 

(1/2) T + 50

 

(1/2) T + 67

 

 

Maximum

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tAC

(2/2) T -

50

 

 

 

(2/2) T -

85

 

(2/2) T -

97

 

 

Minimum

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

t1

(1/2) T -

80

 

 

 

(1/2) T -

60

 

(1/2) T -

63

 

 

Minimum

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

t2

(1/2) T -

40

 

 

 

(1/2) T -

30

 

(1/2) T -

33

 

 

Minimum

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tRV

(3/2) T -

80

 

 

 

(3/2) T -

80

 

(3/2) T -

90

 

 

Minimum

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tlDR

(4/2) T -

180

 

 

 

(4/2) T -

130

 

(4/2) T -

159

 

 

Maximum

 

 

 

 

 

 

 

 

 

 

 

 

 

 

NOTE: N is equal to the total WAIT states.

T = tCyc.

 

 

 

 

 

 

 

 

 

 

 

 

6-21

 

 

 

 

 

AFN·01835C

Page 129 Page 131
Page 130
Image 130
Intel MCS-80/85 manual Bus Timing Specification as a Teye Dependent Symbol, 8085AH 8085AH-2 8085AH-1
Page 129 Page 131

MCS-80/85 specifications

The Intel MCS-80/85 family, introduced in the late 1970s, is a seminal collection of microprocessors that played a pivotal role in the early days of computing. The MCS-80 series, initially targeting embedded systems and control applications, gained remarkable attention due to its innovative architecture and flexible programming capabilities.

The MCS-80 family is anchored by the 8080 microprocessor, which was one of the first fully integrated 8-bit microprocessors. Released in 1974, the 8080 operated at clock speeds ranging from 2 MHz to 3 MHz and featured a 16-bit address bus capable of addressing up to 64KB of memory. The processor’s instruction set included around 78 instructions, providing extensive capabilities for data manipulation, logic operations, and branching.

Complementing the 8080 was a suite of support chips, forming the MCS-80 platform. The most notable among them was the 8155, which integrated a static RAM, I/O ports, and a timer, tailored for ease of designing systems around the 8080. Other support chips included the 8085, which provided improvements with an integrated clock generator, making it compatible with more modern designs and applications.

The MCS-85 series, on the other hand, revolves around the 8085 microprocessor, which provided a more advanced architecture. The 8085 operated at clock speeds of up to 6 MHz and came with a 16-bit address bus, similar to its predecessor. However, it introduced more sophisticated features, including an enhanced instruction set and support for interrupt-driven programming. These enhancements made the 8085 especially appealing to developers working in real-time processing environments.

The MCS-80/85 family utilized NMOS technology, known for its lower power consumption and higher performance compared to previous technologies like TTL. The family’s architecture allowed for easy interfacing with a variety of peripherals, making it a favorite for educational institutions and hobbyists embarking on computer engineering projects.

With its robustness, versatility, and affordability, the Intel MCS-80/85 microprocessors laid the groundwork for many subsequent microcomputer systems and applications. The legacy of this powerful family continues to influence modern microprocessor design, emphasizing the importance of reliable architecture in a rapidly evolving technology landscape.
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