TH E INSTRUCTION SET

INX rp (Increment register pair) (rh) (rl) .- (rh) (rl) + 1

The content of the register pair rp is in- cremented by one. Note: No condition flags are affected.

o

o

R

P

o

o

 

 

 

 

 

 

 

Cycles:

1

 

 

 

States:

6 (8085), 5 (8080)

 

Addressing:

register

 

 

 

Flags:

none

 

DAA

(Decimal Adjust Accumulator)

 

The eight-bit number in the accumulator is

 

adjusted to form two four-bit Binary-Coded-

 

Decimal digits by the following process:

 

1. If the value of the lease significant 4 bits

 

of the accumulator is greater than 9 or if

 

the AC flag is set, 6 is added to the ac-

 

cumulator.

 

2. If the value of the most significant 4 bits

 

of the accumulator is now greater than 9,

 

or if the CY flag is set, 6 is added to the

 

most significant 4 bits of the ac-

 

cumulator.

 

NOTE: All flags are affected.

DCX rp

(Decrement register pair)

(rh) (rl) .- (rh) (rl) - 1

The

content

of

the register pair rp is

decremented

by

one. Note: No condition

flags are affected.

o

o

R

P

o

 

 

 

 

 

 

Cycles:

1

 

 

States:

6 (8085), 5 (8080)

 

Addressing:

register

 

 

Flags:

none

o o o o

Cycles: 1

States: 4

Flags: Z,S,P,CY,AC

5.6.3Logical Group

This group of instructions performs logical (Boolean) operations on data in registers and memory and on condition flags.

Unless indicated otherwise, all instructions in this group affect the Zero, Sign, Parity, Auxiliary Carry, and Carry flags according to the stan- dard rules.

DAD rp

(Add register pair to Hand L)

(H)(L) .- (H) (L) + (rh) (rl)

The content of the register pair rp is added to the content of the register pair Hand L. The result is placed in the register pair H and L. Note: Only the CY flag is affected. It is set if there is a carry out of the double precision add; otherwise it is reset.

o o R P o o

Cycles: 3

States: 10

Addressing: register

Flags: CY

ANA r

(AND Register)

(A) .- (A) /\ (r)

The content of register r is logically ANDed with the content of the accumulator. The result is placed in the accumulator. The CY flag is cleared and AC is set (8085). The CY flag is cleared and AC is set to the OR'ing of bits 3 of the operands (8080).

00 0 S S S

Cycles: 1

States: 4

Addressing: register

Flags: Z,S,P,CY,AC

* All mnemonics copyrighted © Intel Corporation. 1976.

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Intel MCS-80/85 manual Daa, r, 00 0 S S S
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MCS-80/85 specifications

The Intel MCS-80/85 family, introduced in the late 1970s, is a seminal collection of microprocessors that played a pivotal role in the early days of computing. The MCS-80 series, initially targeting embedded systems and control applications, gained remarkable attention due to its innovative architecture and flexible programming capabilities.

The MCS-80 family is anchored by the 8080 microprocessor, which was one of the first fully integrated 8-bit microprocessors. Released in 1974, the 8080 operated at clock speeds ranging from 2 MHz to 3 MHz and featured a 16-bit address bus capable of addressing up to 64KB of memory. The processor’s instruction set included around 78 instructions, providing extensive capabilities for data manipulation, logic operations, and branching.

Complementing the 8080 was a suite of support chips, forming the MCS-80 platform. The most notable among them was the 8155, which integrated a static RAM, I/O ports, and a timer, tailored for ease of designing systems around the 8080. Other support chips included the 8085, which provided improvements with an integrated clock generator, making it compatible with more modern designs and applications.

The MCS-85 series, on the other hand, revolves around the 8085 microprocessor, which provided a more advanced architecture. The 8085 operated at clock speeds of up to 6 MHz and came with a 16-bit address bus, similar to its predecessor. However, it introduced more sophisticated features, including an enhanced instruction set and support for interrupt-driven programming. These enhancements made the 8085 especially appealing to developers working in real-time processing environments.

The MCS-80/85 family utilized NMOS technology, known for its lower power consumption and higher performance compared to previous technologies like TTL. The family’s architecture allowed for easy interfacing with a variety of peripherals, making it a favorite for educational institutions and hobbyists embarking on computer engineering projects.

With its robustness, versatility, and affordability, the Intel MCS-80/85 microprocessors laid the groundwork for many subsequent microcomputer systems and applications. The legacy of this powerful family continues to influence modern microprocessor design, emphasizing the importance of reliable architecture in a rapidly evolving technology landscape.
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