THE INSTRUCTION SET

11

5.6INSTRUCTION SET ENCYCLOPEDIA

In the ensuing dozen pages, the complete 8085A instruction set is described, grouped in order under five different functional headings, as follows:

1.Data Transfer Group - Moves data be- tween registers or between memory locations and registers. Includes moves, loads, stores, and exchanges. (See below.)

2.Arithmetic Group - Adds, subtracts, in- crements, or decrements data in registers or memory. (See page 5-13.)

3.Logic Group - ANDs, DRs, XDRs, com- pares, rotates, or complements data in registers or between memory and a register. (See page 5-16.)

4.Branch Group - Initiates conditional or unconditional jumps, calls, returns, and restarts. (See page 5-20.)

MOV r, M (Move from memory)

(r)- ((H) (L»

The content of the memory location, whose address is in registers Hand L, is moved to register r.

o 1 o o o 1 1 o

Cycles: 2

States: 7

Addressing: reg. indirect

Flags: none

MOV M, r (Move to memory)

((H» (L» - (r)

The content of register r is moved to the memory location whose address is in reg isters Hand L.

0 1 1 0 S S S

11 II

I

!I

I'

I

I

I

I

5.Stack, 110, and Machine Control Group - Includes instructions for maintaining the stack, reading from input ports, writing to output ports, setting and reading interrupt masks, and setting and clearing flags. (See page 5-22.)

The formats described in the encyclopedia reflect the assembly language processed by Intel-supplied assembler, used with the Intellec@ development systems.

Cycles: 2

States: 7

Addressing: reg. indirect

Flags: none

MVI r, data (Move Immediate)

(r) - (byte 2)

The content of byte 2 of the instruction is moved to register r.

o o o o o 1 1 o

data

5.6.1Data Transfer Group

This group of instructions transfers data to and from registers and memory. Condition flags are not affected by any instruction in this group.

MOV r1, r2 (Move Register) (r1) - (r2)

The content of register r2 is moved to register r1.

O. o 0 o S S S

Cycles: 1

States: 4 (8085), 5 (8080)

Addressing: register

Flags: none

 

Cycles:

2

 

States:

7

Addressing:

immediate

 

Flags:

none

MVI M, data

(Move to memory immediate)

((H) (L» -

(byte 2)

 

The content of byte 2 of the instruction is moved to the memory location whose ad- dress is in registers Hand L.

o

o

1

1

o

1

1

I

 

 

 

data

 

 

o

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Cycles:

3

 

 

 

 

 

States:

10

 

 

 

 

Addressing:

immed./reg. indirect

 

 

 

Flags:

none

 

 

 

*AII mnemonics copyrighted©lntel Corporation 1976.

5-4

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Intel MCS-80/85 manual O o 1 1 o, Instruction SET Encyclopedia
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MCS-80/85 specifications

The Intel MCS-80/85 family, introduced in the late 1970s, is a seminal collection of microprocessors that played a pivotal role in the early days of computing. The MCS-80 series, initially targeting embedded systems and control applications, gained remarkable attention due to its innovative architecture and flexible programming capabilities.

The MCS-80 family is anchored by the 8080 microprocessor, which was one of the first fully integrated 8-bit microprocessors. Released in 1974, the 8080 operated at clock speeds ranging from 2 MHz to 3 MHz and featured a 16-bit address bus capable of addressing up to 64KB of memory. The processor’s instruction set included around 78 instructions, providing extensive capabilities for data manipulation, logic operations, and branching.

Complementing the 8080 was a suite of support chips, forming the MCS-80 platform. The most notable among them was the 8155, which integrated a static RAM, I/O ports, and a timer, tailored for ease of designing systems around the 8080. Other support chips included the 8085, which provided improvements with an integrated clock generator, making it compatible with more modern designs and applications.

The MCS-85 series, on the other hand, revolves around the 8085 microprocessor, which provided a more advanced architecture. The 8085 operated at clock speeds of up to 6 MHz and came with a 16-bit address bus, similar to its predecessor. However, it introduced more sophisticated features, including an enhanced instruction set and support for interrupt-driven programming. These enhancements made the 8085 especially appealing to developers working in real-time processing environments.

The MCS-80/85 family utilized NMOS technology, known for its lower power consumption and higher performance compared to previous technologies like TTL. The family’s architecture allowed for easy interfacing with a variety of peripherals, making it a favorite for educational institutions and hobbyists embarking on computer engineering projects.

With its robustness, versatility, and affordability, the Intel MCS-80/85 microprocessors laid the groundwork for many subsequent microcomputer systems and applications. The legacy of this powerful family continues to influence modern microprocessor design, emphasizing the importance of reliable architecture in a rapidly evolving technology landscape.
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