Registers | Intel MCS-80/85 manual

ARCHITECTURE OF THE 8080 CPU

The 8080 CPU consists of the following functional

units:

•Register array and address logic

•Arithmetic and logic unit (ALU)

•Instruction register and control section

•Bi-directional, 3-state data bus buffer

Figure 4·2 illustrates the functional blocks within the 8080 CPU.

matically during every instruction fetch. The stack pointer maintains the address of the next available stack location in memory. The stack pointer can be initialized to use any portion of read·write memory as a stack. The stack pointer is decremented when data is "pushed" onto the stack and incremented when data is "popped" off the stack (Le., the stack grows "downward").

The six general purpose registers can be used either as single registers (8·bit) or as register pairs 06·bit). The temporary register pair, W,Z, is not program addressable and is only used for the internal execution of instructions.

Registers:

The register section consists of a static RAM array organized into six 16·bit registers:

•Program counter (PC)

•Stac::k pointer (SP)

•Six 8-bit general purpose registers arranged in pairs, referred to as B,C; D,E; and H,L

•A temporary register pair called W,Z

The program counter maintains the memory address of the next program instruction and is incremented auto-

Eight-bit data bytes can ~e transferred between the internal bus and the register array via the register-select multiplexer. Sixteen-bit transfers can proceed between the register array and the address latch or the incrementer / decrementer circuit. The address latch receives data from any of the four register pairs and drives the 16 address output buffers (AO-A1Sl. as well as the incrementerl decrementer circu it. The incrementer /decrementer circu it

receives data from the address latch and sends it to the register array. The 16-bit data can be increm~nted or

decremented or simply transferred between registers.

BI·DIRECTIONAL

DATA BUS

(8 BITI

INTERNAL DATA BUS

INSTRUCTION

DECODER

AND

MACHINE

CYCLE

ENCODING

		TIMING
		AND
		CONTROL
POWER	+12V
SUPPLIES1_ -	+5V

_ - 5V - GND

	(81	(81

D	(81	(81
REG.
H	(el	(81

REG.

1161

STACK POINTER

1161

PROGRAM COUNTER

A15 • Ao

ADDRESS BUS

Figure 4-2. 8080 CPU Functional Block Diagram

4-2

MCS-80/85 specifications

The Intel MCS-80/85 family, introduced in the late 1970s, is a seminal collection of microprocessors that played a pivotal role in the early days of computing. The MCS-80 series, initially targeting embedded systems and control applications, gained remarkable attention due to its innovative architecture and flexible programming capabilities.

The MCS-80 family is anchored by the 8080 microprocessor, which was one of the first fully integrated 8-bit microprocessors. Released in 1974, the 8080 operated at clock speeds ranging from 2 MHz to 3 MHz and featured a 16-bit address bus capable of addressing up to 64KB of memory. The processor’s instruction set included around 78 instructions, providing extensive capabilities for data manipulation, logic operations, and branching.

Complementing the 8080 was a suite of support chips, forming the MCS-80 platform. The most notable among them was the 8155, which integrated a static RAM, I/O ports, and a timer, tailored for ease of designing systems around the 8080. Other support chips included the 8085, which provided improvements with an integrated clock generator, making it compatible with more modern designs and applications.

The MCS-85 series, on the other hand, revolves around the 8085 microprocessor, which provided a more advanced architecture. The 8085 operated at clock speeds of up to 6 MHz and came with a 16-bit address bus, similar to its predecessor. However, it introduced more sophisticated features, including an enhanced instruction set and support for interrupt-driven programming. These enhancements made the 8085 especially appealing to developers working in real-time processing environments.

The MCS-80/85 family utilized NMOS technology, known for its lower power consumption and higher performance compared to previous technologies like TTL. The family’s architecture allowed for easy interfacing with a variety of peripherals, making it a favorite for educational institutions and hobbyists embarking on computer engineering projects.

With its robustness, versatility, and affordability, the Intel MCS-80/85 microprocessors laid the groundwork for many subsequent microcomputer systems and applications. The legacy of this powerful family continues to influence modern microprocessor design, emphasizing the importance of reliable architecture in a rapidly evolving technology landscape.

Intel MCS-80/85 manual Registers

Models: MCS-80/85