Intel MCS-80/85 manual 8085A 8080Al8085A Instruction SET Index

Models: MCS-80/85

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8085A

8080Al8085A INSTRUCTION SET INDEX

Table 5·1

Instruction

Code

Bytes

T States

Machine Cycles

BOB5A

BOBDA

 

 

 

 

 

 

 

 

 

 

 

 

ACI

DATA

CE data

2

7

7

F R

ADC

REG

1000 lSSS

1

4

4

F

ADC

M

8E

1

7

7

F R

ADD

REG

10000SSS

1

4

4

F

ADD

M

86

1

7

7

F R

ADI

DATA

C6 data

2

7

7

F R

ANA

REG

10100SSS

1

4

4

F

ANA

M

A6

1

7

7

F R

ANI

DATA

E6 data

2

7

7

F R

CALL

LABEL

CD addr

3

18

17

SRRWW*

CC

LABEL

DC addr

3

9/18

11/17

S R-/S R RWW*

CM

LABEL

FC addr

3

9/18

11/17

SR_/SRRWW*

CMA

 

2F

1

4

4

F

CMC

 

3F

1

4

4

F

CMP

REG

10111SSS

1

4

4

F

CMP

M

BE

1

7

7

F R

CNC

LABEL

04 addr

3

9/18

11/17

SR-/SRRWW*

CNZ

LABEL

C4 addr

3

9/18

11/17

SR-/SRRWW*

CP

LABEL

F4 addr

3

9/18

11/17

SR_/SRRWW*

CPE

LABEL

EC addr

3

9/18

11/17

SR-/SRRWW*

CPI

DATA

FE data

2

7

7

FR

CPO

LABEL

E4 addr

3

9/18

11/17

S R-/SR RWW*

CZ

LABEL

CC addr

3

9/18

11/17

SR_/SRRWW*

DAA

 

27

1

4

4

F

DAD

RP

OORP 1001

1

10

10

FBB

OCR

REG

OOSS S101

1

4

5

F*

OCR

M

35

1

10

10

F R W

DCX

RP

OORP 1011

1

6

5

S*

01

 

F3

1

4

4

F

EI

 

FB

1

4

4

F

 

HLT

 

76

1

5

7

F B

IN

PORT

DB data

2

10

10

F R I

INR

REG

OOSS S100

1

4

5

F*

INR

M

34

1

10

10

F R W

INX

RP

OORP 0011

1

6

5

S*

JC

LABEL

DA addr

3

7/10

10

F R/F R Rt

JM

LABEL

FA addr

3

7/10

10

F R/F R Rt

JMP

LABEL

C3 addr

3

10

10

F R R

JNC

LABEL

02 addr

3

7/10

10

F R/F R Rt

JNZ

LABEL

C2 addr

3

7/10

10

F R/F R Rt

JP

LABEL

F2 addr

3

7/10

10

F R/F R Rt

JPE

LABEL

EA addr

3

7/10

10

F R/F R Rt

JPO

LABEL

E2 addr

3

7/10

10

F R/F R Rt

JZ

LABEL

CA addr

3

7/10

10

F R/F R Rt

LOA

ADDR

3A addr

3

13

13

F R R R

LDAX

RP

OOOX 1010

1

7

7

F R

LHLD

ADDR

2A addr

3

16

16

F R R R R

Instruction

Code

Bytes

T States

Machine Cycles

BOBSA

 

BOBDA

 

 

 

 

 

 

LXI

RP,DATA16

OORP 0001 data16

3

10

10

F R R

MOV

REG,REG

0100 DSSS

1

4

5

F*

MOV

M,REG

01110SSS

1

7

7

FW

MOV

REG,M

01000110

1

7

7

F R

MVI

REG,DATA

00000110 data

2

7

7

F R

MVI

M,DATA

36 data

2

10

10

F R W

NOP

 

00

1

4

4

F

ORA

REG

10110SSS

1

4

4

F

ORA

M

B6

1

7

7

F R

ORI

DATA

F6 data

2

 

7

F R

7

OUT

PORT

03 data

2

10

10

FRO

PCHL

 

E9

1

6

5

S*

POP

RP

llRPOOOl

1

10,

10

F R R

PUSH

RP

llRP 0101

1

12

11

SWW*

RAL

 

17

1

4

4

F

RAR

 

IF

1

4

4

F

RC

 

08

1

6/12

5/11

SIS R R*

RET

 

C9

1

10

10

F R R

RIM (8085A only)

20

1

4

-

F

RLC

 

07

1

4

4

F

RM

 

F8

1

6/12

5/11

SIS R R*

RNC

 

DO

1

6/12

5/11

SIS R R*

RNZ

 

CO

1

6/12

5/11

SIS R R*

RP

 

FO

1

6/12

5/11

SIS R R*

 

RPE

 

E8

1

6/12

5/11

SIS R R*

RPO

 

EO

1

6/12

5/11

SIS R R*

RRC

 

OF

1

4

4

F

RST

N

llXX XIII

1

12

11

SWW*

RZ

 

C8

1

6/12

5/11

SIS R R*

SBB

REG

10011SSS

1

4

4

F

SBB

M

9E

1

7

7

F R

SBI

DATA

DE data

2

7

7

F R

SHLD

ADDR

22 addr

3

16

16

F R RWW

SIM (8085A only)

30

1

4

-

F

SPHL

 

F9

1

6

5

S*

STA

ADDR

32 addr

3

13

13

F R R W

STAX

RP

OOOX 0010

1

7

7

FW

STC

 

37

1

4

4

F

SUB

REG

1001 OSSS

1

4

4

F

SUB

M

96

1

7

7

F R

SUI

DATA

06 data

2

7

7

F R

XCHG

 

EB

1

4

4

F

XRA

REG

1010 ISSS

1

4

4

F

XRA

M

AE

1

7

7

F R

XRI

DATA

EE data

2

7

7

F R

XTHL

 

E3

1

16

18

FRRWW

 

 

 

 

 

 

 

 

Mach ine cycle types:

Four clock period instr fetch Six clock period instr fetch Memory read

lID read

WMemory write lID write Bus idle

XVariable or optional binary digit

DOD

Binary digits identifying a destination register

B ~ 000, C ~ 001, D ~ 010

Memory ~ 110

SSS

Binary digits identifying a source register

E ~ OIl, H ~ 100, L ~ 101

A ~ 111

RP

BC~00,HL~10

 

 

Register Pair

 

 

 

DE~OI,SP~11

 

 

* Five clock period instruction fetch with aOaOA.

tThe longer machine cycle sequence applies regardless of condition evaluation with a080A. _An extra READ cycle (R) will occur for this condition with a080A.

"All mnemonics copyrighted <0lntel Corporation 1976.

5-19

Page 104
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Intel MCS-80/85 manual 8085A 8080Al8085A Instruction SET Index

MCS-80/85 specifications

The Intel MCS-80/85 family, introduced in the late 1970s, is a seminal collection of microprocessors that played a pivotal role in the early days of computing. The MCS-80 series, initially targeting embedded systems and control applications, gained remarkable attention due to its innovative architecture and flexible programming capabilities.

The MCS-80 family is anchored by the 8080 microprocessor, which was one of the first fully integrated 8-bit microprocessors. Released in 1974, the 8080 operated at clock speeds ranging from 2 MHz to 3 MHz and featured a 16-bit address bus capable of addressing up to 64KB of memory. The processor’s instruction set included around 78 instructions, providing extensive capabilities for data manipulation, logic operations, and branching.

Complementing the 8080 was a suite of support chips, forming the MCS-80 platform. The most notable among them was the 8155, which integrated a static RAM, I/O ports, and a timer, tailored for ease of designing systems around the 8080. Other support chips included the 8085, which provided improvements with an integrated clock generator, making it compatible with more modern designs and applications.

The MCS-85 series, on the other hand, revolves around the 8085 microprocessor, which provided a more advanced architecture. The 8085 operated at clock speeds of up to 6 MHz and came with a 16-bit address bus, similar to its predecessor. However, it introduced more sophisticated features, including an enhanced instruction set and support for interrupt-driven programming. These enhancements made the 8085 especially appealing to developers working in real-time processing environments.

The MCS-80/85 family utilized NMOS technology, known for its lower power consumption and higher performance compared to previous technologies like TTL. The family’s architecture allowed for easy interfacing with a variety of peripherals, making it a favorite for educational institutions and hobbyists embarking on computer engineering projects.

With its robustness, versatility, and affordability, the Intel MCS-80/85 microprocessors laid the groundwork for many subsequent microcomputer systems and applications. The legacy of this powerful family continues to influence modern microprocessor design, emphasizing the importance of reliable architecture in a rapidly evolving technology landscape.