inter 8080Al8080A·1/8080A·2

!1

WAVEFORMS (Continued)

WAIT

HOLD I -

___ t nr ............

HlDA

INT

INTE

NOTES: (Parenthesis gives -1, -2 specifications, respectively)

1.Data input should be enabled with DBIN status. No bus con- flict can then occur and data hold time is assured.

tOH = 50 ns or tOF, whichever is less.

2.tCY = t03 + tr<f>2 +t,p2 + tf<f>2 + t02 + tr<f>1 ;;. 4BO ns ( - 1:320 ns, - 2:3BO ns).

TYPICAL A OUTPUT DELAY VS. A CAPACITANCE

>- o~

I-

12

I-

:::l

o..,

+100

..\ CAPACITANCE (pI)

(CACTUAL - CSPEC )

3.The following are relevant when interfacing the BOBOA to devices having V,H = 3.3V:

a)Maximum output rise time from .BV to 3.3V = 100ns @ CL = SPEC.

b)Output delay when measured to3.0V = SPEC +60ns@CL = SPEC.

c)If CL = SPEC, add .6ns/pF if CL > CSPEC, subtract .3ns/pF (from modified delay) if CL < CSPEC.

4.tAW = 2 tCY- t03 - t r<f>2 - 140 ns ( - 1:110 ns, - 2:130 ns).

5.tow = tCY - t03 - tr<f>2 - 170 ns ( - 1:150 ns, - 2:170 ns).

6.If not HLDA, two = tWA = tD3 + tr<f>2 + 10 ns. If HLDA, two = tWA = tWF·

7.tHF = t03 + tr<f>2 -50 ns).

B.tWF = t03 + tr<f>2 - 10ns.

9.Data in must be stable for this period during DBIN T3. Both tOS1 and tOS2 must be satisfied.

10.Ready signal must be stable for this period during T2 or Tw. (Must be externally synchronized.)

11.Hold signal must be stable for this period during T2 or Tw when entering hold mode, and during T3, T4, Ts and TWH when in hold mode. (External synchronization is not re- quired.)

12.Interrupt signal must be stable during this period of the last clock cycle of any instruction in order to be recognized on the following instruction. (External synchronization is not re- quired.)

13.This timing diagram shows timing relationships only; it does not represent any specific machine cycle.

I',

6-6

AFN·00735C

 

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Intel MCS-80/85 manual Inter 8080Al8080A·1/8080A·2 Waveforms

MCS-80/85 specifications

The Intel MCS-80/85 family, introduced in the late 1970s, is a seminal collection of microprocessors that played a pivotal role in the early days of computing. The MCS-80 series, initially targeting embedded systems and control applications, gained remarkable attention due to its innovative architecture and flexible programming capabilities.

The MCS-80 family is anchored by the 8080 microprocessor, which was one of the first fully integrated 8-bit microprocessors. Released in 1974, the 8080 operated at clock speeds ranging from 2 MHz to 3 MHz and featured a 16-bit address bus capable of addressing up to 64KB of memory. The processor’s instruction set included around 78 instructions, providing extensive capabilities for data manipulation, logic operations, and branching.

Complementing the 8080 was a suite of support chips, forming the MCS-80 platform. The most notable among them was the 8155, which integrated a static RAM, I/O ports, and a timer, tailored for ease of designing systems around the 8080. Other support chips included the 8085, which provided improvements with an integrated clock generator, making it compatible with more modern designs and applications.

The MCS-85 series, on the other hand, revolves around the 8085 microprocessor, which provided a more advanced architecture. The 8085 operated at clock speeds of up to 6 MHz and came with a 16-bit address bus, similar to its predecessor. However, it introduced more sophisticated features, including an enhanced instruction set and support for interrupt-driven programming. These enhancements made the 8085 especially appealing to developers working in real-time processing environments.

The MCS-80/85 family utilized NMOS technology, known for its lower power consumption and higher performance compared to previous technologies like TTL. The family’s architecture allowed for easy interfacing with a variety of peripherals, making it a favorite for educational institutions and hobbyists embarking on computer engineering projects.

With its robustness, versatility, and affordability, the Intel MCS-80/85 microprocessors laid the groundwork for many subsequent microcomputer systems and applications. The legacy of this powerful family continues to influence modern microprocessor design, emphasizing the importance of reliable architecture in a rapidly evolving technology landscape.