Platform Management Architecture Overview | Intel SE7520JR2 manual

Intel® Server Board SE7520JR2

Platform Management

5.1Platform Management Architecture Overview

		LM 93

				ProcHot
	VID_CPU0[5:0]	P1_VID[5:0]		ProcHot
	VID_CPU0[5:0]	P1_VID[5:0]
	VID_CPU1[5:0]			ThermTrip
	VID_CPU1[5:0]	P2_VID[5:0]		ThermTrip
	Not Used
	Not Used	+12V1
	P12V_CPU_SCALED	+12V1
	P12V_CPU_SCALED	+12V2		IERR
	P12V_SCALED	+12V2		IERR
	P_VTT	+12V3
	P_VTT	FSB_Vtt
	P1V5	FSB_Vtt
	Not Used	Chipset_Core
	P_VCCP0	ICH_Core
	P_VCCP1	CPU1_Vccp		PWM1
	P3V3	CPU2_Vccp		PWM1
	P5V	3.3V
	P1V8_SCSI	+5V		PWM2
	DDR Core	SCSI_Core		PWM2
	DDR Vtt	Mem_Core
	DDR Vtt	Mem_Vtt
	GbLAN Core	Mem_Vtt
	N12V_SCALED	GBIT _Core
	P3V3_STBY	-12V
		+3.3 S/B Vcc
	SCSIA_TERMPWR	SCSI_term1
	SCSIB_TERMPWR	SCSI_term1
	SCSIB_TERMPWR	SCSI_term2		Tach1
		SCSI_term2

Zone 1

Zone2

CPU CPU Fan

Fan Fan

CPU1

CPU2

Fan

Config

Check Logic

PC87431 mBMC

CPU1Thermal Diode	RTD(1)	Tach2
	RTD(1)
CPU2Thermal Diode
	RTD(2)	Tach3
		Tach3
		Tach4

PC87427

SIO

Fan

Fan

Front Panel Connector

CPU_CFG_ERR_N

FP_ID_BTN_N

FP_RST_BTN

FP_PWR_BTN

FP_NMI_BTN

FP_ID_LED_N

FP_SYS_FLT_LED_A FP_SYS_FLT_LED_C

SECURE_MODE_KB FRB3_TMR_HALT_N PS_PWR_GD

CPU1_SEL

CPU2_SEL

ICH_RST_BTN ICH_PWR_BTN

SYS_NMI

SYS_SMI

FANIN1

FANIN2

Mem

FANIN3 Fan

	1 WIREBus	Temp
		Temp
Chassis	CHASSISINTRUSION
Chassis	SECURE_MODE_KB
Security	SECURE_MODE_KB
Security
LED	PWR_LED

Figure 19. On-Board Platform Management Architecture

Revision 1.0	115
	C78844-002

Image 115

Intel SE7520JR2 manual Platform Management Architecture Overview, PC87427

Contents

Intel Server Board SE7520JR2 Date Revision Modifications Number Revision History Intel Server Board SE7520JR2Revision C78844-002 Intel Server Board SE7520JR2 Disclaimers Iii Table of Contents RTC Intel Server Board SE7520JR2 Table of Contents System Bios Table of Contents Intel Server Board SE7520JR2 Vii 113Platform Management Viii C78844-002 149 Error Reporting and Handling 201 175 FCC USA Design and Environmental Specifications202 216 Xii Revision C78844-002 Appendix a Integration and Usage Tips 221222 225 Xiii Intel Server Board SE7520JR2 List of Figures Xiv List of Tables Intel Server Board SE7520JR2 Intel Server Board SE7520JR2 List of Tables Xvi Xvii Xviii Revision C78844-002 This page intentionally left blank Intel Server Board SE7520JR2 Introduction Chapter OutlineRevision C78844-002 Introduction Intel Server Board SE7520JR2 Server Board Use Disclaimer Server Board SE7520JR2 SKU Availability Server Board SE7520JR2 Feature Set Server Board Overview Intel Server Board SE7520JR2 SE7520JR2 Board Layout Revision C78844-002 32 33 Ref # Description Server Board Dimensions Revision C78844-002 Functional Architecture Intel Server Board SE7520JR2 Server Board SE7520JR2 Block Diagram Revision C78844-002 Processor Module Presence Detection Reset Configuration LogicProcessor Sub-system Processor Voltage Regulators Processor Family FSB Frequency Support Common Enabling Kit CEK Design SupportProcessor Support Processor Support Matrix Mixed Processor Models Jumperless Processor Speed SettingsProcessor Mis-population Detection Mixed Processor Steppings Multiple Processor Initialization Processor Thermal Trip Shutdown Intel E7520 ChipsetCPU Thermal Sensors Processor Thermal Control Sensor PCI Express Memory Controller Hub MCHFront Side Bus FSB MCH Memory Sub-System Overview Low Profile Riser Slot PCI-X Hub PXHHub Interface Full-height Riser Slot PCI Interface 3 I/O Controller Hub ICH5-R2.3 I/OxAPIC Controller SMBus Interface Low Pin Count LPC Interface Sata Controller 3.8 RTC Enhanced Power ManagementAdvanced Programmable Interrupt Controller Apic Universal Serial Bus USB Controller Memory Sizing Memory Sub-System 1GB 2GB Memory Population1GB 2GB 4GB Supported DDR-333 Dimm Populations DDR-266 & DDR-333 Dimm population rules are as followsDDR2 400 Dimm population rules are as follows Supported DDR-266 Dimm Populations Memory Test ECC Memory Initialization Memory Monitoring Memory Feature On-board Professional AdvancedMemory Monitoring Support by Server Management Level Dram ECC Intel x4 Single Device Data Correction x4 Sddc Memory Rasum FeaturesIntegrated Memory Scrub Engine Integrated Memory Initialization Engine Retry on Uncorrectable Error Dimm Sparing Function Memory Mirroring Four Dimm Memory Mirror Configuration Dimm PCI Subsystem I/O Sub-SystemLogging Memory RAS Information to the SEL PCI Riser Slots 1.1 P32-A 32-bit, 33-MHz PCI Subsystem1.2 P64-A and P64-B 64-bit, 100MHz PCI Subsystem 1.3 P64-Express Dual x4 PCI Bus Segment PCI Bus Numbering PCI Scan Order Device Number and Idsel Mapping Bus# / Device# / Function# PCI DevicePCAD28 Interrupt Routing Split Option ROM PCI Interrupt Routing/Sharing Apic Interrupt RoutingInterrupt Serialized IRQ Support Legacy Interrupt SourcesInterrupt Definitions Intr IRQ Scan for PciirqICH5-R PXH Ioapic PCI-E Interface Interface IRQ PCI Interrupt Mapping Diagram Scsi Support 4.1.1 53C1030 Summary of Features4.1 LSI* 53C1030 Dual Channel Ultra320 Scsi Controller Revision C78844-002 Zero Channel RAID IDE Support Ultra ATA/100 Sata SupportIDE Initialization Video Modes Video SupportSata RAID Intel RAID Technology Option ROM Column Address Select Signal Name Type DescriptionVideo Memory Interface Video Memory Interface Network Interface Controller NIC EnabledDual video GPIOs NIC Connector and Status LEDsUSB 2.0 Support Super I/O Chip XBUSA9 GPIOE13/XA8 Zzbiosrolling GPIOE45/LED2GPIOE11/XA10 GPIOE12/XA9 Serial Port Multiplexer Logic Serial PortsSerial Port a Serial Port B BMC Rear RJ45 Serial B Port Configuration Keyboard and Mouse Support Bios FlashRemovable Media Drives Floppy Disk Support Memory Space Configuration and Initialization1MB DOS Compatibility Region Revision C78844-002 DOS Compatibility Region DOS Area Add-in Card Bios and Buffer AreaExtended System Bios System Bios Extended Memory Map Revision C78844-002 Extended Memory PCI Memory Space High Bios1.2.5 I/O Apic Configuration Space Main Memory Range System Management Mode HandlingGlobal Enable High Enable Tseg Enable Compatible High H SMM Space Table O Map 2 I/O MapAddress es Resource Revision Accessing Configuration Space Clock Generation and Distribution Configaddress Register System Bios Intel Server Board SE7520JR2 Bios Identification String User Interface Flash Architecture and Flash Update UtilityBios Power On Self Test Post Intel Server Board SE7520JR2 System Bios System Diagnostic Screen Splash Screen/Diagnostic WindowSystem Activity Window Quiet Boot / OEM Splash Screen Bios Boot Popup MenuPost Activity Window Localization Bios Setup UtilityBios Setup Keyboard Command Bar Options Please select boot device Bios Setup, Main Menu Options Entering Bios SetupMain Menu Advanced Menu Bios Setup, Advanced Menu OptionsEnglish CPU Cpuid Processor Configuration Sub-menuBios Setup, Processor Configuration Sub-menu Options Disabled A1-3rdM/A2-4thM IDE Configuration Sub-menuBios Setup IDE Configuration Menu Options Both Host & Device Mixed P-ATA-S-ATA Configuration with only Primary P-ATAATA M-S SWDMA0-1 AutoCdrom Armd SWDMA0-0 Bios Setup, Super I/O Configuration Sub-menu Floppy Configuration Sub-menuSuper I/O Configuration Sub-menu Bios Setup, Floppy Configuration Sub-menu Selections HiSpeed USB Configuration Sub-menuUSB Mass Storage Device Configuration Sub-menu Bios Setup, USB Configuration Sub-menu Selections Bios Setup, PCI Configuration Sub-menu Selections PCI Configuration Sub-menu Bios Setup, Memory Configuration Sub-menu Selections Memory Configuration Sub-menu Dimm 3B Boot MenuBios Setup, Boot Menu Selections Dimm 3A Off Boot Settings Configuration Sub-menu SelectionsBios Setup, Boot Settings Configuration Sub-menu Selections This is 2.3.5 Atapi Cdrom drives sub-menu selections Boot Device Priority Sub-menu Selections2.3.3 Hard Disk Drive Sub-menu Selections 2.3.4 Removable Drive Sub-menu Selections Minute Bios Setup, Security Menu OptionsSecurity Menu Limited Stays Off Bios Setup, Server Menu SelectionsDisable BSP Server Menu Stay On Bios Setup, System Management Sub-menu SelectionsSystem Management Sub-menu Selections 100 C78844-002 Bios Setup, Event Log Configuration Sub-menu Selections Serial Console Features Sub-menu SelectionsEvent Log Configuration Sub-menu Selections Bios Setup, Serial Console Features Sub-menu Selections Exit Menu Rolling Bios and On-line UpdatesBios Setup, Exit Menu Selections Feature Options Help Text User Binary Area Flash Update UtilityFlash Bios Recovery Mode Bios Recovery Configuration Reset104 Revision C78844-002 Security OEM BinaryRevision 105 C78844-002 Operating Model Security Features Operating Model106 Revision C78844-002 107 Scenario #1Scenario #2 Scenario #3 EFI Shell Operating System Boot, Sleep, and WakePassword Clear Jumper Extensible Firmware Interface EFI Sleep and Wake Functionality Advanced Configuration and Power Interface AcpiRevision 109 C78844-002 On to Sleep Acpi Power Switch Off to OnOn to Off OS absent On to Off OS present System Sleep States Sleep to On AcpiC78844-002 111 Console Redirection PXE Bios Support112 Revision C78844-002 Revision 113 C78844-002 Suppoted Management Features by TierIntel Management 114 Revision C78844-002 Platform Management Intel Server Board SE7520JR2 PC87427 Platform Management Architecture Overview 1 5V Standby Ipmi Messaging, Commands, and Abstractions116 Revision C78844-002 Revision 117 C78844-002 Ipmi ‘Sensor Model’ Management Controllers Private Management Busses118 Revision C78844-002 Revision 119 C78844-002 120 Revision C78844-002 Revision 121 C78844-002 On-Board Platform Management Features and Functionality Server Management I2C Bus ID Assignments Power Control InterfacesServer Management I2C Buses External Interface to the mBMC Revision 123 C78844-002 MBMC Hardware Architecture 124 Revision C78844-002 Power Supply Interface Signals Revision 125 C78844-002 Power Supply Control Signals System Reset Control Power Control SourcesPower-up Sequence Power-down Sequence Reset button assertion Reset Control SourcesControl Panel System Reset Power button assertion SSI Power LED Operation Combined power and reset button assertionControl Panel Indicators Power LED Chassis ID LED Fault / Status LEDNon-Critical Condition Degraded Condition Chassis Intrusion Power ButtonReset Button Diagnostic Interrupt Button Control Panel NMI MBMC Peripheral SMBus Secure Mode OperationWatchdog Timer Baseboard Fan Control Initialization Agent Sensor Data Record SDR RepositorySEL Erasure Timestamp Clock Event Message Reception Field Replaceable Unit FRU Inventory DevicesNMI Generation SMI Generation Messaging Interfaces MBMC Self Test LAN Channel Capability Options LAN InterfaceLAN Channel Capacity Revision 135 C78844-002 Platform Event Filtering PEF Event Filtering and Alerting136 Revision C78844-002 PEF Action Priorities Action Priority Delayed TypeMBMC Sensor Support Alert over LAN 138 Revision C78844-002 Platform Sensors for On-Board Platform InstrumentationEvent Readable Value/Offsets Action Type Revision 139 C78844-002Sensor # Event Event Offset Assert Readable Sensor Name Reading Event Data Record Type Triggers Ierr 140 Revision C78844-002ID LED Revision 141 C78844-002 Sensor Event Event Offset Assert Readable IMM BMC Sensor Support142 Number Type Triggers Deassert Offsets 143 C78844-002 Intel Server Board SE7520JR2 Platform Management 144 Lvds Scsi FRB1, FRB2 OEMFRB3 Dimm VRM System Management Bios Smbios Wired For Management WFMVital Product Data VPD 2 FRB2 BSP Post Failures Fault Resilient Booting FRBIntel Server Board SE7520JR2 Error Reporting and Handling 1 FRB1 BSP Self-Test Failures 150 Revision C78844-002 3 FRB3 BSP Reset FailuresOS Watchdog Timer Operating System Load Failures Error Reporting and Handling Intel Server Board SE7520JR2 Treatment of Failed Processors AP FailuresRevision 151 C78844-002 Memory Error Handling in RAS Mode Memory Error Handling152 Revision C78844-002 Memory Error Handling mBMC vs Sahalee Memory Error Handling in non-RAS ModeRevision 153 C78844-002 154 Revision C78844-002 Single-bit ECC Error Throttling PreventionMemory Error Handling in non-RAS mode Dimm Enabling SMI Handler Error LoggingPCI Bus Error Processor Bus Error Error Messages and Error Codes No ROM Basic Boot Bios MessagesStorage Device Bios Messages 157 C78844-002 158 159 C78844-002 Eprom Virus Related Bios MessagesSystem Configuration Bios Messages 160 161 C78844-002 Cmos Bios MessagesMiscellaneous Bios Messages USB Bios Error Messages Error Code Error Message Response Post Error CodesSmbios Bios Error Messages Error Codes and Messages C78844-002 163 0146 Insufficient Memory to Shadow PCI ROM Pause Error code Error messages Error Codes Sent to the Management Module164 Number of Beeps Description Bios Generated Post Error Beep CodesBios Generated Beep Codes Revision 165 C78844-002 BMC Generated Beep Codes Professional/Advanced only Boot Block Error Beep CodesBoot Block Error Beep Codes Number of Beeps Troubleshooting Action Post Progress Code LED Example System ROM Bios Post Task Test Point Port 80h CodeDiagnostic LEDs Checkpoints Post Code Checkpoints Diagnostic LEDsPost Code Checkpoints Back edge of baseboard 169 C78844-002 Cmos Bootblock Initialization Code CheckpointsBootblock Initialization Code Checkpoints 170 Revision C78844-002 Bootblock Recovery Code Checkpoint Bootblock Recovery Code Checkpoint171 C78844-002 Checkpoint Description DIM Code CheckpointsDIM Code Checkpoints 172 Revision C78844-002 Acpi Runtime Checkpoints Memory Error CodesPost Progress Fifo Professional / Advanced only 174 Revision C78844-002 Light Guided Diagnostics 12V Power Connector J4J1 Power ConnectorsIntel Server Board SE7520JR2 Connectors and Jumper Blocks Power Connector Pin-out Low Profile Riser Slot Pinout IDE Power Connector Pinout U2E1Riser Slots Low Profile PCI-X Riser Slot Pin PCI Spec Description Side a Signal Pin PCI Spec Description Side SignalRevision 177 C78844-002 178 Revision C78844-002 Connectors and Jumper Blocks Intel Server Board SE7520JR2 Prsntn Pin connector length = 139.45mm=5.49Full Height PCI-X Riser Slot Revision 179 C78844-002 Perstn Pin-Side PCI Spec Description Signal180 Revision C78844-002 REFCLK2 Revision 181 C78844-002 182 Revision C78844-002 PAR64 Revision 183 C78844-002Pxhrst 184 Revision C78844-002 Intel Management Module ConnectorIMM Connector Pinout J1C1 System Management Headers Description Pin C78844-002 185 186 C78844-002 Icmb Header Pin-out J1D1 Pin Signal Name Type DescriptionIcmb Header Ipmb Header 188 Revision C78844-002 Pin Signal Name Description Pin Signal Name Control Panel ConnectorsOEM RMC Connector J3B2 OEM RMC Connector Pinout J3B2 190 Revision C78844-002 Pin# Signal Name Pin # P5VSTBY Fpidledl FPSTATUSLED1R Fpidbtnl GND Fphddfltledr Control Panel SSI Standard 34-Pin Header Pin-outRevision 191 C78844-002 P5V P5VSTBY 192 I/O ConnectorsVGA Connector VGA Connector Pin-out Internal/External 68-pin Vhdci Scsi Connector Pin-out NIC ConnectorsScsi Connectors RJ-45 10/100/1000 NIC Connector Pin-out Signal Name Pin# ATA-100 ConnectorATA-100 40-pin Connector Pin-out J3K1 Pin# Signal Name Revision 195 C78844-002 Sata ConnectorsFloppy Controller Connector Sata Connector Pin-out J1H1 and J1H5 196 Revision C78844-002 Serial Port ConnectorsExternal RJ-45 Serial B Port Pin-out Internal 9-pin Serial a Header Pin-out J1A3 Stacked PS/2 Keyboard and Mouse Port Pin-out Keyboard and Mouse ConnectorUSB Connector External USB Connector Pin-out 198 Revision C78844-002 Internal 1x10 USB Connector Pin-out J1F1Internal 2x5 USB Connector J1G1 Fan Headers Intel Server Chassis Fan Header Pin-out J3K6 CPU1/CPU2 Fan Connector Pin-out J5F2, J7F1Revision 199 C78844-002 Chassis Intrusion Header Misc. Headers and ConnectorsHard Drive Activity LED Header Revision 201 C78844-002 SettingsJumper Blocks Jumper Block Definitions Board Design Specifications Server Board SE7520JR2 Design SpecificationPower Supply Requirements Output Connectors Revision 203 C78844-002 Power Harness Specification Drawing P2 Processor Power Connector P1 Main Power ConnectorP2 Processor Power Connector P1 Main Power Connector Grounding P3 Power Signal ConnectorP4 Peripheral Connectors P7 Hard Drive Back Plane Power Connector Standby Outputs Remote Sense206 Revision C78844-002 Transient Load Requirements Voltage RegulationDynamic Loading Voltage Regulation Limits Ripple / Noise Common Mode NoiseCapacitive Loading Closed Loop Stability Output Voltage Timing Soft StartingZero Load Stability Requirements Timing Requirements 100 1000 210 Revision C78844-0021500 2500 Revision 211 C78844-002 Residual Voltage Immunity in Standby Mode 212 Revision C78844-002 Product Safety ComplianceProduct Regulatory Compliance Product EMC Compliance Class a Compliance Revision 213 C78844-002 Certifications / Registrations / DeclarationsProduct Regulatory Compliance Markings Product Certification Markings 214 Revision C78844-002 Electromagnetic Compatibility NoticesFCC USA Industry Canada ICES-003 Revision 215 C78844-002 Europe CE Declaration of ConformityTaiwan Declaration of Conformity Bsmi Korean Compliance RRL Programming FRU and SDR Data Updating the System Software216 Revision C78844-002 Revision 217 C78844-002 Cmos Clear Using J1H2 Jumper BlockCmos Clear using Control Panel Clearing Cmos 218 Revision C78844-002 Bios Recovery Operation Revision 219 C78844-002 Page Revision 221 C78844-002 Appendix a Integration and Usage Tips 222 Glossary Intel Server Board SE7520JR2Term Definition C78844-002 223 Intel Server Board SE7520JR2 Glossary 224 Revision C78844-002 Revision 225 C78844-002 Intel Server Board SE7520JR2 Reference Documents