Intel SE7520JR2 C78844-002, Intel® Server Board SE7520JR2, Table 123: Turn On/Off Timing, Figure 28. Output Voltage Timing, Design and Environmental Specifications

Design and Environmental Specifications Intel® Server Board SE7520JR2

Vout

10%

Vout

V1

V2

V3

V4

Tvout rise Tvout_off

Tvout_on

Figure 28. Output Voltage TimingTable 123: Turn On/Off Timing

Item	Description	Minimum	Maximum	Units
Tsb_on_delay	Delay from AC being applied to 5VSB being within regulation.		1500	msec
T ac_on_delay	Delay from AC being applied to all output voltages being		2500	msec
	within regulation.
Tvout_holdup	Time all output voltages stay within regulation after loss of	21		msec
	AC.
Tpwok_holdup	Delay from loss of AC to de-assertion of PWOK	20		msec
Tpson_on_delay	Delay from PSON# active to output voltages within regulation	5	400	msec
	limits.
T pson_pwok	Delay from PSON# deactive to PWOK being de-asserted.		50	msec
Tpwok_on	Delay from output voltages within regulation limits to PWOK	100	1000	msec
	asserted at turn on.
T pwok_off	Delay from PWOK de-asserted to output voltages (3.3V, 5V,	1		msec
	12V, -12V) dropping out of regulation limits.
Tpwok_low	Duration of PWOK being in the de-asserted state during an	100		msec
	off/on cycle using AC or the PSON signal.
Tsb_vout	Delay from 5VSB being in regulation to O/Ps being in	50	1000	msec
	regulation at AC turn on.
T5VSB_holdup	Time the 5VSB output voltage stays within regulation after	70		msec
	loss of AC.

210	Revision 1.0
	C78844-002