Intel SE7520JR2 manual 169

Intel® Server Board SE7520JR2					Error Reporting and Handling
Checkpoint	Diagnostic LED Decoder				Description
	G=Green, R=Red, A=Amber
	MSB			LSB
C6	R	A	G	OFF	Re-enable cache for boot strap processor
C7	R	A	G	G	Early CPU Init Exit
0A	G	OFF	G	OFF	Initializes the 8042 compatible Key Board Controller.
0B	G	OFF	G	G	Detects the presence of PS/2 mouse.
0C	G	G	OFF	OFF	Detects the presence of Keyboard in KBC port.
					Testing and initialization of different Input Devices. Also, update the
0E	G	G	G	OFF	Kernel Variables.
					Traps the INT09h vector, so that the POST INT09h handler gets
					control for IRQ1. Uncompress all available language, BIOS logo, and
					Silent logo modules.
13	OFF	OFF	G	A	Early POST initialization of chipset registers.
24	OFF	G	R	OFF	Uncompress and initialize any platform specific BIOS modules.
30	OFF	OFF	R	R	Initialize System Management Interrupt.
2A	G	OFF	A	OFF	Initializes different devices through DIM.
					See DIM Code Checkpoints section of document for more information.
2C	G	G	R	OFF	Initializes different devices. Detects and initializes the video adapter
					installed in the system that have optional ROMs.
2E	G	G	A	OFF	Initializes all the output devices.
					Allocate memory for ADM module and uncompress it. Give control to
31	OFF	OFF	R	A	ADM module for initialization. Initialize language and font modules for
					ADM. Activate ADM module.
33	OFF	OFF	A	A	Initializes the silent boot module. Set the window for displaying text
					information.
37	OFF	G	A	A	Displaying sign-on message, CPU information, setup key message,
					and any OEM specific information.
38	G	OFF	R	R	Initializes different devices through DIM. See DIM Code Checkpoints
					section of document for more information.
39	G	OFF	R	A	Initializes DMAC-1 and DMAC-2.
3A	G	OFF	A	R	Initialize RTC date/time.
3B	G	OFF	R	A	Test for total memory installed in the system. Also, Check for DEL or
					ESC keys to limit memory test. Display total memory in the system.
3C	G	G	R	R	Mid POST initialization of chipset registers.
					Detect different devices (Parallel ports, serial ports, and coprocessor
40	OFF	R	OFF	OFF	in CPU, … etc.) successfully installed in the system and update the
					BDA, EBDA…etc.
50	OFF	R	OFF	R	Programming the memory hole or any kind of implementation that
					needs an adjustment in system RAM size if needed.
52	OFF	R	G	R	Updates CMOS memory size from memory found in memory test.
					Allocates memory for Extended BIOS Data Area from base memory.
60	OFF	R	R	OFF	Initializes NUM-LOCK status and programs the KBD typematic rate.
75	OFF	A	R	A	Initialize Int-13 and prepare for IPL detection.
78	G	R	R	R	Initializes IPL devices controlled by BIOS and option ROMs.
7A	G	R	A	R	Initializes remaining option ROMs.
7C	G	A	R	R	Generate and write contents of ESCD in NVRam.
84	R	G	OFF	OFF	Log errors encountered during POST.
85	R	G	OFF	G	Display errors to the user and gets the user response for error.
87	R	G	G	G	Execute BIOS setup if needed / requested.
Revision 1.0					169
					C78844-002