Intel® Server Board SE7520JR2

Functional Architecture

Using the following algorithm, BIOS configures the memory controller of the MCH to run in either dual channel mode or single channel mode:

(1)If 1 or more fully populated DIMM banks are detected, the memory controller is set to dual channel mode. Otherwise, go to step (2)

(2)If DIMM 1A is present, set memory controller to single channel mode A. Otherwise, go to step (3)

(3)If Channel 1B DIMM is present, set memory controller to single channel mode B. Otherwise, generate a memory configuration error

DDR-266 & DDR-333 DIMM population rules are as follows:

(1)DIMM banks must be populated in order starting with the slots furthest from MCH

(2)Single rank DIMMs must be populated before dual rank DIMMs

(3)A maximum of four DIMMs can be populated when all four DIMMs are dual rank DDR-333 DIMMs.

DDR2 400 DIMM population rules are as follows:

(1)DIMMs banks must be populated in order starting with the slots furthest from MCH

(2)Dual rank DIMMs are populated before single rank DIMMs

(3)A maximum of four DIMMs can be populated when all four DIMMs are dual rank DDR2-400 DIMMs

The following tables show the supported memory configurations.

s/r = single rank

d/r = dual rank

E = Empty

Table 3: Supported DDR-266 DIMM Populations

 

Bank 3 – DIMMs 3A, 3B

Bank 2 – DIMMs 2A, 2B

Bank 1 – DIMMs 1A, 1B

 

S/R

S/R

S/R

 

 

 

 

 

E

S/R

S/R

 

 

 

 

 

E

E

S/R

 

 

 

 

MCH

D/R

D/R

D/R

 

 

 

E

D/R

D/R

 

E

E

D/R

 

 

 

 

 

D/R

S/R

S/R

 

 

 

 

 

D/R

D/R

S/R

 

 

 

 

 

E

D/R

S/R

 

 

 

 

Table 4: Supported DDR-333 DIMM Populations

 

MCH

Bank 3 – DIMMs 3A, 3B

Bank 2 – DIMMs 2A, 2B2

Bank 1 – DIMMs 1A, 1B

 

 

S/R

S/R

S/R

 

 

 

E

S/R

S/R

 

 

 

 

 

 

 

 

 

E

E

S/R

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Revision 1.0

 

 

39

 

 

C78844-002