Power Supply Interface Signals | Intel SE7520JR2 guide

Platform Management

Intel® Server Board SE7520JR2

Figure 22. mBMC Block Diagram

5.3.1Power Supply Interface Signals

The mBMC supports two power supply control signals: Power On and Power Good. The Power On signal connects to the chassis power subsystem through the chipset and is used to request power state changes (asserted = request Power On). Power Good is a signal from the chassis power subsystem indicating current power state (asserted = power is on).

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Intel SE7520JR2 manual Power Supply Interface Signals, Revision C78844-002

Contents

Intel Server Board SE7520JR2 Revision History Intel Server Board SE7520JR2 RevisionC78844-002 Date Revision Modifications Number Iii Intel Server Board SE7520JR2 Disclaimers Table of Contents Intel Server Board SE7520JR2 Table of Contents RTC Table of Contents Intel Server Board SE7520JR2 System Bios Vii 113Platform Management Viii C78844-002 Error Reporting and Handling 149 175 201 Design and Environmental Specifications 202216 FCC USA Appendix a Integration and Usage Tips 221 222225 Xii Revision C78844-002 Intel Server Board SE7520JR2 List of Figures Xiii List of Tables Intel Server Board SE7520JR2 Xiv Intel Server Board SE7520JR2 List of Tables Xvi Xvii This page intentionally left blank Xviii Revision C78844-002 Intel Server Board SE7520JR2 Introduction Chapter OutlineRevision C78844-002 Server Board Use Disclaimer Introduction Intel Server Board SE7520JR2 Server Board SE7520JR2 Feature Set Server Board SE7520JR2 SKU Availability Server Board Overview Intel Server Board SE7520JR2 32 33 SE7520JR2 Board Layout Revision C78844-002 Ref # Description Server Board Dimensions Revision C78844-002 Server Board SE7520JR2 Block Diagram Revision C78844-002 Functional Architecture Intel Server Board SE7520JR2 Reset Configuration Logic Processor Sub-systemProcessor Voltage Regulators Processor Module Presence Detection Common Enabling Kit CEK Design Support Processor SupportProcessor Support Matrix Processor Family FSB Frequency Support Jumperless Processor Speed Settings Processor Mis-population DetectionMixed Processor Steppings Mixed Processor Models Multiple Processor Initialization Intel E7520 Chipset CPU Thermal SensorsProcessor Thermal Control Sensor Processor Thermal Trip Shutdown Memory Controller Hub MCH Front Side Bus FSBMCH Memory Sub-System Overview PCI Express PCI-X Hub PXH Hub InterfaceFull-height Riser Slot Low Profile Riser Slot 3 I/O Controller Hub ICH5-R 2.3 I/OxAPIC ControllerSMBus Interface PCI Interface Sata Controller Low Pin Count LPC Interface Enhanced Power Management Advanced Programmable Interrupt Controller ApicUniversal Serial Bus USB Controller 3.8 RTC Memory Sub-System Memory Sizing 1GB 2GB Memory Population1GB 2GB 4GB DDR-266 & DDR-333 Dimm population rules are as follows DDR2 400 Dimm population rules are as followsSupported DDR-266 Dimm Populations Supported DDR-333 Dimm Populations ECC Memory Initialization Memory Test Memory Monitoring Memory Feature On-board Professional AdvancedMemory Monitoring Support by Server Management Level Dram ECC Intel x4 Single Device Data Correction x4 Sddc Memory Rasum FeaturesIntegrated Memory Scrub Engine Retry on Uncorrectable Error Integrated Memory Initialization Engine Dimm Sparing Function Four Dimm Memory Mirror Configuration Memory Mirroring Dimm PCI Subsystem I/O Sub-SystemLogging Memory RAS Information to the SEL 1.1 P32-A 32-bit, 33-MHz PCI Subsystem 1.2 P64-A and P64-B 64-bit, 100MHz PCI Subsystem1.3 P64-Express Dual x4 PCI Bus Segment PCI Riser Slots PCI Scan Order PCI Bus Numbering Device Number and Idsel Mapping Bus# / Device# / Function# PCI DevicePCAD28 Split Option ROM Interrupt Routing PCI Interrupt Routing/Sharing Apic Interrupt RoutingInterrupt Serialized IRQ Support Legacy Interrupt SourcesInterrupt Definitions IRQ Scan for Pciirq ICH5-R PXH Ioapic PCI-E InterfaceInterface Intr IRQ PCI Interrupt Mapping Diagram Scsi Support 4.1.1 53C1030 Summary of Features4.1 LSI* 53C1030 Dual Channel Ultra320 Scsi Controller Revision C78844-002 IDE Support Zero Channel RAID Ultra ATA/100 Sata SupportIDE Initialization Video Support Sata RAIDIntel RAID Technology Option ROM Video Modes Signal Name Type Description Video Memory InterfaceVideo Memory Interface Column Address Select Network Interface Controller NIC EnabledDual video NIC Connector and Status LEDs USB 2.0 SupportSuper I/O Chip GPIOs Zzbiosrolling GPIOE45/LED2 GPIOE11/XA10GPIOE12/XA9 XBUSA9 GPIOE13/XA8 Serial Ports Serial Port aSerial Port B Serial Port Multiplexer Logic Rear RJ45 Serial B Port Configuration BMC Bios Flash Removable Media DrivesFloppy Disk Support Keyboard and Mouse Support Memory Space Configuration and Initialization1MB DOS Compatibility Region DOS Compatibility Region Revision C78844-002 Add-in Card Bios and Buffer Area Extended System BiosSystem Bios DOS Area Extended Memory Extended Memory Map Revision C78844-002 High Bios 1.2.5 I/O Apic Configuration SpaceMain Memory PCI Memory Space System Management Mode Handling Global Enable High Enable Tseg Enable Compatible High HSMM Space Table Range O Map 2 I/O MapAddress es Resource Revision Accessing Configuration Space Configaddress Register Clock Generation and Distribution Bios Identification String System Bios Intel Server Board SE7520JR2 Flash Architecture and Flash Update Utility Bios Power On Self Test PostIntel Server Board SE7520JR2 System Bios User Interface System Diagnostic Screen Splash Screen/Diagnostic WindowSystem Activity Window Quiet Boot / OEM Splash Screen Bios Boot Popup MenuPost Activity Window Bios Setup Utility Bios Setup Keyboard Command Bar OptionsPlease select boot device Localization Bios Setup, Main Menu Options Entering Bios SetupMain Menu Advanced Menu Bios Setup, Advanced Menu OptionsEnglish Processor Configuration Sub-menu Bios Setup, Processor Configuration Sub-menu OptionsDisabled CPU Cpuid IDE Configuration Sub-menu Bios Setup IDE Configuration Menu OptionsBoth A1-3rdM/A2-4thM Host & Device Mixed P-ATA-S-ATA Configuration with only Primary P-ATAATA M-S Auto Cdrom ArmdSWDMA0-0 SWDMA0-1 Floppy Configuration Sub-menu Super I/O Configuration Sub-menuBios Setup, Floppy Configuration Sub-menu Selections Bios Setup, Super I/O Configuration Sub-menu USB Configuration Sub-menu USB Mass Storage Device Configuration Sub-menuBios Setup, USB Configuration Sub-menu Selections HiSpeed PCI Configuration Sub-menu Bios Setup, PCI Configuration Sub-menu Selections Memory Configuration Sub-menu Bios Setup, Memory Configuration Sub-menu Selections Boot Menu Bios Setup, Boot Menu SelectionsDimm 3A Dimm 3B Boot Settings Configuration Sub-menu Selections Bios Setup, Boot Settings Configuration Sub-menu SelectionsThis is Off Boot Device Priority Sub-menu Selections 2.3.3 Hard Disk Drive Sub-menu Selections2.3.4 Removable Drive Sub-menu Selections 2.3.5 Atapi Cdrom drives sub-menu selections Bios Setup, Security Menu Options Security MenuLimited Minute Bios Setup, Server Menu Selections Disable BSPServer Menu Stays Off Bios Setup, System Management Sub-menu Selections System Management Sub-menu Selections100 C78844-002 Stay On Serial Console Features Sub-menu Selections Event Log Configuration Sub-menu SelectionsBios Setup, Serial Console Features Sub-menu Selections Bios Setup, Event Log Configuration Sub-menu Selections Rolling Bios and On-line Updates Bios Setup, Exit Menu SelectionsFeature Options Help Text Exit Menu Flash Update Utility Flash BiosRecovery Mode User Binary Area Bios Recovery Configuration Reset104 Revision C78844-002 Security OEM BinaryRevision 105 C78844-002 Operating Model Security Features Operating Model106 Revision C78844-002 Scenario #1 Scenario #2Scenario #3 107 Operating System Boot, Sleep, and Wake Password Clear JumperExtensible Firmware Interface EFI EFI Shell Sleep and Wake Functionality Advanced Configuration and Power Interface AcpiRevision 109 C78844-002 Power Switch Off to On On to Off OS absentOn to Off OS present On to Sleep Acpi System Sleep States Sleep to On AcpiC78844-002 111 Console Redirection PXE Bios Support112 Revision C78844-002 Revision 113 C78844-002 Suppoted Management Features by TierIntel Management Platform Management Intel Server Board SE7520JR2 114 Revision C78844-002 Platform Management Architecture Overview PC87427 1 5V Standby Ipmi Messaging, Commands, and Abstractions116 Revision C78844-002 Ipmi ‘Sensor Model’ Revision 117 C78844-002 Management Controllers Private Management Busses118 Revision C78844-002 Revision 119 C78844-002 120 Revision C78844-002 On-Board Platform Management Features and Functionality Revision 121 C78844-002 Power Control Interfaces Server Management I2C BusesExternal Interface to the mBMC Server Management I2C Bus ID Assignments MBMC Hardware Architecture Revision 123 C78844-002 Power Supply Interface Signals 124 Revision C78844-002 Power Supply Control Signals Revision 125 C78844-002 Power Control Sources Power-up SequencePower-down Sequence System Reset Control Reset Control Sources Control Panel System ResetPower button assertion Reset button assertion Combined power and reset button assertion Control Panel IndicatorsPower LED SSI Power LED Operation Fault / Status LED Non-Critical ConditionDegraded Condition Chassis ID LED Power Button Reset ButtonDiagnostic Interrupt Button Control Panel NMI Chassis Intrusion Secure Mode Operation Watchdog TimerBaseboard Fan Control MBMC Peripheral SMBus Sensor Data Record SDR Repository SEL ErasureTimestamp Clock Initialization Agent Field Replaceable Unit FRU Inventory Devices NMI GenerationSMI Generation Event Message Reception MBMC Self Test Messaging Interfaces LAN Interface LAN Channel CapacityRevision 135 C78844-002 LAN Channel Capability Options Platform Event Filtering PEF Event Filtering and Alerting136 Revision C78844-002 Action Priority Delayed Type MBMC Sensor SupportAlert over LAN PEF Action Priorities 138 Revision C78844-002 Platform Sensors for On-Board Platform InstrumentationEvent Readable Revision 139 C78844-002 Sensor # Event Event Offset Assert ReadableSensor Name Reading Event Data Record Type Triggers Value/Offsets Action Type Ierr 140 Revision C78844-002ID LED Revision 141 C78844-002 IMM BMC Sensor Support 142Number Type Triggers Deassert Offsets Sensor Event Event Offset Assert Readable Intel Server Board SE7520JR2 Platform Management 143 C78844-002 144 Lvds Scsi FRB1, FRB2 OEMFRB3 VRM Dimm System Management Bios Smbios Wired For Management WFMVital Product Data VPD Fault Resilient Booting FRB Intel Server Board SE7520JR2 Error Reporting and Handling1 FRB1 BSP Self-Test Failures 2 FRB2 BSP Post Failures 3 FRB3 BSP Reset Failures OS Watchdog Timer Operating System Load FailuresError Reporting and Handling Intel Server Board SE7520JR2 150 Revision C78844-002 Treatment of Failed Processors AP FailuresRevision 151 C78844-002 Memory Error Handling in RAS Mode Memory Error Handling152 Revision C78844-002 Memory Error Handling mBMC vs Sahalee Memory Error Handling in non-RAS ModeRevision 153 C78844-002 Single-bit ECC Error Throttling Prevention Memory Error Handling in non-RAS modeDimm Enabling 154 Revision C78844-002 Error Logging PCI Bus ErrorProcessor Bus Error SMI Handler Error Messages and Error Codes Boot Bios Messages Storage Device Bios Messages157 C78844-002 No ROM Basic 158 159 C78844-002 Virus Related Bios Messages System Configuration Bios Messages160 Eprom Cmos Bios Messages Miscellaneous Bios MessagesUSB Bios Error Messages 161 C78844-002 Post Error Codes Smbios Bios Error MessagesError Codes and Messages Error Code Error Message Response 0146 Insufficient Memory to Shadow PCI ROM Pause C78844-002 163 Error code Error messages Error Codes Sent to the Management Module164 Bios Generated Post Error Beep Codes Bios Generated Beep CodesRevision 165 C78844-002 Number of Beeps Description Boot Block Error Beep Codes Boot Block Error Beep CodesNumber of Beeps Troubleshooting Action BMC Generated Beep Codes Professional/Advanced only System ROM Bios Post Task Test Point Port 80h Code Diagnostic LEDsCheckpoints Post Progress Code LED Example Diagnostic LEDs Post Code CheckpointsBack edge of baseboard Post Code Checkpoints 169 C78844-002 Bootblock Initialization Code Checkpoints Bootblock Initialization Code Checkpoints170 Revision C78844-002 Cmos Bootblock Recovery Code Checkpoint Bootblock Recovery Code Checkpoint171 C78844-002 DIM Code Checkpoints DIM Code Checkpoints172 Revision C78844-002 Checkpoint Description Acpi Runtime Checkpoints Memory Error CodesPost Progress Fifo Professional / Advanced only Light Guided Diagnostics 174 Revision C78844-002 Power Connectors Intel Server Board SE7520JR2 Connectors and Jumper BlocksPower Connector Pin-out 12V Power Connector J4J1 IDE Power Connector Pinout U2E1 Riser SlotsLow Profile PCI-X Riser Slot Low Profile Riser Slot Pinout Pin PCI Spec Description Side a Signal Pin PCI Spec Description Side SignalRevision 177 C78844-002 Connectors and Jumper Blocks Intel Server Board SE7520JR2 178 Revision C78844-002 Pin connector length = 139.45mm=5.49 Full Height PCI-X Riser SlotRevision 179 C78844-002 Prsntn Pin-Side PCI Spec Description Signal 180 Revision C78844-002REFCLK2 Perstn Revision 181 C78844-002 182 Revision C78844-002 PAR64 Revision 183 C78844-002Pxhrst Intel Management Module Connector IMM Connector Pinout J1C1System Management Headers 184 Revision C78844-002 C78844-002 185 Description Pin 186 C78844-002 Pin Signal Name Type Description Icmb HeaderIpmb Header Icmb Header Pin-out J1D1 Pin Signal Name Description 188 Revision C78844-002 Control Panel Connectors OEM RMC Connector J3B2OEM RMC Connector Pinout J3B2 Pin Signal Name Pin# Signal Name Pin # 190 Revision C78844-002 Control Panel SSI Standard 34-Pin Header Pin-out Revision 191 C78844-002P5V P5VSTBY P5VSTBY Fpidledl FPSTATUSLED1R Fpidbtnl GND Fphddfltledr I/O Connectors VGA ConnectorVGA Connector Pin-out 192 NIC Connectors Scsi ConnectorsRJ-45 10/100/1000 NIC Connector Pin-out Internal/External 68-pin Vhdci Scsi Connector Pin-out ATA-100 Connector ATA-100 40-pin Connector Pin-out J3K1Pin# Signal Name Signal Name Pin# Sata Connectors Floppy Controller ConnectorSata Connector Pin-out J1H1 and J1H5 Revision 195 C78844-002 Serial Port Connectors External RJ-45 Serial B Port Pin-outInternal 9-pin Serial a Header Pin-out J1A3 196 Revision C78844-002 Keyboard and Mouse Connector USB ConnectorExternal USB Connector Pin-out Stacked PS/2 Keyboard and Mouse Port Pin-out Internal 1x10 USB Connector Pin-out J1F1 Internal 2x5 USB Connector J1G1Fan Headers 198 Revision C78844-002 Intel Server Chassis Fan Header Pin-out J3K6 CPU1/CPU2 Fan Connector Pin-out J5F2, J7F1Revision 199 C78844-002 Chassis Intrusion Header Misc. Headers and ConnectorsHard Drive Activity LED Header Settings Jumper BlocksJumper Block Definitions Revision 201 C78844-002 Server Board SE7520JR2 Design Specification Power Supply RequirementsOutput Connectors Board Design Specifications Power Harness Specification Drawing Revision 203 C78844-002 P1 Main Power Connector P2 Processor Power ConnectorP1 Main Power Connector P2 Processor Power Connector P3 Power Signal Connector P4 Peripheral ConnectorsP7 Hard Drive Back Plane Power Connector Grounding Standby Outputs Remote Sense206 Revision C78844-002 Voltage Regulation Dynamic LoadingVoltage Regulation Limits Transient Load Requirements Common Mode Noise Capacitive LoadingClosed Loop Stability Ripple / Noise Soft Starting Zero Load Stability RequirementsTiming Requirements Output Voltage Timing 210 Revision C78844-002 15002500 100 1000 Residual Voltage Immunity in Standby Mode Revision 211 C78844-002 Product Safety Compliance Product Regulatory ComplianceProduct EMC Compliance Class a Compliance 212 Revision C78844-002 Certifications / Registrations / Declarations Product Regulatory Compliance MarkingsProduct Certification Markings Revision 213 C78844-002 Electromagnetic Compatibility Notices FCC USAIndustry Canada ICES-003 214 Revision C78844-002 Europe CE Declaration of Conformity Taiwan Declaration of Conformity BsmiKorean Compliance RRL Revision 215 C78844-002 Programming FRU and SDR Data Updating the System Software216 Revision C78844-002 Cmos Clear Using J1H2 Jumper Block Cmos Clear using Control PanelClearing Cmos Revision 217 C78844-002 Bios Recovery Operation 218 Revision C78844-002 Revision 219 C78844-002 Page Appendix a Integration and Usage Tips Revision 221 C78844-002 222 Glossary Intel Server Board SE7520JR2Term Definition Intel Server Board SE7520JR2 Glossary C78844-002 223 224 Revision C78844-002 Intel Server Board SE7520JR2 Reference Documents Revision 225 C78844-002

Platform Management

Figure 22. mBMC Block Diagram

5.3.1Power Supply Interface Signals

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