Intel® Server Board SE7520JR2

 

 

 

Platform Management

 

 

 

 

 

 

 

 

 

 

 

 

Number

 

Type

Triggers

Deassert

Offsets

 

Rearm

Standby

 

Sensor

 

Event /

Event Offset

Assert /

Readable

 

 

 

Sensor Name

Sensor Type

Reading

Value /

EventData

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IERR

 

 

 

 

 

 

 

 

 

Thermal Trip

 

 

 

 

 

Processor 2

 

Processor

Sensor

FRB1, FRB2,

 

 

 

 

 

91h

Specific

FRB3

As & De

Trig Offset

M

X

Status

07h

 

6Fh

Config Error

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Presence

 

 

 

 

 

 

 

 

 

Disabled

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Processor 1 Core

98h

Temp

Threshold

[u,l][nr,c,nc]

As & De

Analog

R, T

A

Temp

 

01h

01h

 

 

 

 

 

 

Processor 2 Core

99h

Temp

Threshold

[u,l][nr,c,nc]

As & De

Analog

R, T

A

Temp

 

01h

01h

 

 

 

 

 

 

Processor 1 12v

B8h

Voltage

Threshold

[u,l][ nr,c,nc]

As & De

Analog

R, T

A

VRM

 

02h

01h

 

 

 

 

 

 

Processor 2 12v

B9h

Voltage

Threshold

[u,l][ nr,c,nc]

As & De

Analog

R, T

A

VRM

 

02h

01h

 

 

 

 

 

 

Processor 1

 

Temp

Digital

Transitioned to

 

 

 

 

 

C0h

Discrete

Non-Critical from

As & De

Trig Offset

M

Thermal Control

01h

 

07h

OK

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Processor 2

 

Temp

Digital

Transitioned to

 

 

 

 

 

C1h

Discrete

Non-Critical from

As & De

Trig Offset

M

Thermal Control

01h

 

07h

OK

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Processor 1 VRD

 

Temp

Digital

Transitioned to

 

 

 

 

 

C8h

Discrete

Non-Critical from

As & De

Trig Offset

M

Over Temp

 

01h

07h

OK

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Processor 2 VRD

 

Temp

Digital

Transitioned to

 

 

 

 

 

C9h

Discrete

Non-Critical from

As & De

Trig Offset

M

Over Temp

 

01h

07h

OK

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Processor 1 Vcc

D0h

Voltage

Threshold

[u,l][ nr,c,nc]

As & De

Analog

R, T

A

 

 

02h

01h

 

 

 

 

 

 

Processor 2 Vcc

D1h

Voltage

Threshold

[u,l][ nr,c,nc]

As & De

Analog

R, T

A

 

 

02h

01h

 

 

 

 

 

 

CPU Configuration

D8h

Processor

Generic

State Asserted

As & De

Discrete

R, T

A

-

Error

07h

03h

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Sensor

Fault Status

 

 

 

 

 

 

 

Slot Connector

Asserted

 

 

 

 

 

DIMM 1

E0h

Specific

 

As

Trig Offset

A

21h

Device Installed

 

 

6Fh

 

 

 

 

 

 

 

 

Disabled

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Sensor

Fault Status

 

 

 

 

 

 

 

Slot Connector

Asserted

 

 

 

 

 

DIMM 2

E1h

Specific

 

As

Trig Offset

A

21h

Device Installed

 

 

6Fh

 

 

 

 

 

 

 

 

Disabled

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Sensor

Fault Status

 

 

 

 

 

 

 

Slot Connector

Asserted

 

 

 

 

 

DIMM 3

E2h

Specific

 

As

Trig Offset

A

21h

Device Installed

 

 

6Fh

 

 

 

 

 

 

 

 

Disabled

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Revision 1.0

147

 

C78844-002