Intel SE7520JR2 List of Figures, C78844-002, List of Figures, Intel® Server Board SE7520JR2

Intel® Server Board SE7520JR2	List of Figures
List of Figures
Figure 1. SE7520JR2 Board Layout ...........................................................................................	23
Figure 2. Server Board Dimensions............................................................................................	25
Figure 3. Server Board SE7520JR2 Block Diagram ...................................................................	26
Figure 4. CEK Processor Mounting ............................................................................................	28
Figure 5. Identifying Banks of Memory .......................................................................................	38
Figure 6. Four DIMM Memory Mirror Configuration ....................................................................	45
Figure 7. Six DIMM Memory Mirror Configuration (DDR2 Only) .................................................	46
Figure 8. Interrupt Routing Diagram (ICH5-R Internal) ...............................................................	55
Figure 9. Interrupt Routing Diagram ...........................................................................................	56
Figure 10. PCI Interrupt Mapping Diagram .................................................................................	57
Figure 11. PCI Interrupt Mapping Diagram for 2U Active Riser Card .........................................	57
Figure 12. Serial Port Mux Logic.................................................................................................	68
Figure 13. RJ45 Serial B Port Jumper Block Location and Setting.............................................	68
Figure 14. Intel® Xeon™ Processor Memory Address Space.....................................................	70
Figure 15. DOS Compatibility Region .........................................................................................	71
Figure 16. Extended Memory Map..............................................................................................	73
Figure 17. BIOS Identification String...........................................................................................	80
Figure 18. POST Console Interface............................................................................................	82
Figure 19. On-Board Platform Management Architecture.........................................................	115
Figure 20. mBMC in a Server Management System.................................................................	121
Figure 21. External Interfaces to mBMC...................................................................................	123
Figure 22. mBMC Block Diagram .............................................................................................	124
Figure 23. Power Supply Control Signals .................................................................................	125
Figure 24. Location of Diagnostic LEDs on Baseboard ............................................................	168
Figure 25. 34-Pin SSI Compliant Control Panel Header...........................................................	192
Figure 26. System Configuration (J1H2) Jumper Block Settings..............................................	201
Figure 27. Power Harness Specification Drawing.....................................................................	203
Figure 28. Output Voltage Timing .............................................................................................	210
Figure 29. Turn On/Off Timing (Power Supply Signals)............................................................	211

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	C78844-002