Functional Architecture

 

 

 

 

 

Intel® Server Board SE7520JR2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

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Mirror Primar Primar /Mirror

Figure 7. Six DIMM Memory Mirror Configuration (DDR2 Only)

These symmetry requirements are a side effect of the hardware mechanism for maintaining two copies of all main memory data while ensuring that each channel has a full copy of all data in preparation for fail-down to single-channel operation. Every write to memory is issued twice, once to the “primary” location, and again to the “mirror” location, and the data interleaved across the channel pair are swapped for the second write (1A is a copy of 2B, 1B is a copy of 2A etc.). The resulting memory image has two full copies of all data, and a complete copy available on each channel.

Hardware in the MCH tracks which DIMM slots are primaries, and which are mirrors, such that data may be internally realigned to correctly reassemble cache lines regardless of which copy is retrieved. There are four distinct cases for retrieval of the “even” and “odd” chunks of a cache- line of data:

•Interleaved dual-channel read to the primary DIMM with “even” data on channel A

•Interleaved dual-channel read to the mirror DIMM with “even” data on channel B

•Non-interleaved single-channel read pair to channel A with “even” data on the primary

DIMM

•Non-interleaved single-channel read pair to channel B with “even” data on the mirror DIMM

When mirroring is enabled via MCH configuration, the memory subsystem maintains two copies of all data as described above, and will retrieve requested data from either primary or mirror based on the state of system address bit 15 (SA[15]). Software may toggle which SA[15] polarity selects primary vs. mirror via a configuration register bit setting. SA[15] was chosen because it is the lowest system address bit that is always used to select the memory row address across all DRAM densities and technologies supported by the E7520 MCH. The toggling of the primary read location based on an address bit will distribute request traffic across

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Revision 1.0

 

C78844-002