Extended Memory | Intel SE7520JR2 specs

Intel® Server Board SE7520JR2

Functional Architecture

3.5.1.2Extended Memory

Extended memory is defined as all address space greater than 1MB. Extended Memory region covers 8GB maximum of address space from addresses 0100000h to FFFFFFFh, as shown in the following figure. PCI memory space can be remapped to top of memory (TOM).

Extended

lntel E7520 chipset region

PCI Memory Space

Main Memory Address Region

High BIOS Area

APIC Space

512KB Extended System Management RAM

Optional Fixed Memory Hole

64GB

Top Of Memory (TOM)

FFFFFFFFh

FFE00000h

FEC0FFFFh

FEC00000h

Top of Low Memory (TOLM) Depends on installed DIMMs

16MB

15MB

100000h

Figure 16. Extended Memory Map

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Intel SE7520JR2 manual Extended Memory Map Revision C78844-002

Contents

Intel Server Board SE7520JR2 Revision Revision History Intel Server Board SE7520JR2C78844-002 Date Revision Modifications Number Intel Server Board SE7520JR2 Disclaimers Iii Table of Contents RTC Intel Server Board SE7520JR2 Table of Contents System Bios Table of Contents Intel Server Board SE7520JR2 Vii 113Platform Management Viii C78844-002 149 Error Reporting and Handling 201 175 202 Design and Environmental Specifications216 FCC USA 222 Appendix a Integration and Usage Tips 221225 Xii Revision C78844-002 Xiii Intel Server Board SE7520JR2 List of Figures Xiv List of Tables Intel Server Board SE7520JR2 Intel Server Board SE7520JR2 List of Tables Xvi Xvii Xviii Revision C78844-002 This page intentionally left blank Intel Server Board SE7520JR2 Introduction Chapter OutlineRevision C78844-002 Introduction Intel Server Board SE7520JR2 Server Board Use Disclaimer Server Board SE7520JR2 SKU Availability Server Board SE7520JR2 Feature Set Server Board Overview Intel Server Board SE7520JR2 SE7520JR2 Board Layout Revision C78844-002 32 33 Ref # Description Server Board Dimensions Revision C78844-002 Functional Architecture Intel Server Board SE7520JR2 Server Board SE7520JR2 Block Diagram Revision C78844-002 Processor Sub-system Reset Configuration LogicProcessor Voltage Regulators Processor Module Presence Detection Processor Support Common Enabling Kit CEK Design SupportProcessor Support Matrix Processor Family FSB Frequency Support Processor Mis-population Detection Jumperless Processor Speed SettingsMixed Processor Steppings Mixed Processor Models Multiple Processor Initialization CPU Thermal Sensors Intel E7520 ChipsetProcessor Thermal Control Sensor Processor Thermal Trip Shutdown Front Side Bus FSB Memory Controller Hub MCHMCH Memory Sub-System Overview PCI Express Hub Interface PCI-X Hub PXHFull-height Riser Slot Low Profile Riser Slot 2.3 I/OxAPIC Controller 3 I/O Controller Hub ICH5-RSMBus Interface PCI Interface Low Pin Count LPC Interface Sata Controller Advanced Programmable Interrupt Controller Apic Enhanced Power ManagementUniversal Serial Bus USB Controller 3.8 RTC Memory Sizing Memory Sub-System 1GB 2GB Memory Population1GB 2GB 4GB DDR2 400 Dimm population rules are as follows DDR-266 & DDR-333 Dimm population rules are as followsSupported DDR-266 Dimm Populations Supported DDR-333 Dimm Populations Memory Test ECC Memory Initialization Memory Monitoring Memory Feature On-board Professional AdvancedMemory Monitoring Support by Server Management Level Dram ECC Intel x4 Single Device Data Correction x4 Sddc Memory Rasum FeaturesIntegrated Memory Scrub Engine Integrated Memory Initialization Engine Retry on Uncorrectable Error Dimm Sparing Function Memory Mirroring Four Dimm Memory Mirror Configuration Dimm PCI Subsystem I/O Sub-SystemLogging Memory RAS Information to the SEL 1.2 P64-A and P64-B 64-bit, 100MHz PCI Subsystem 1.1 P32-A 32-bit, 33-MHz PCI Subsystem1.3 P64-Express Dual x4 PCI Bus Segment PCI Riser Slots PCI Bus Numbering PCI Scan Order Device Number and Idsel Mapping Bus# / Device# / Function# PCI DevicePCAD28 Interrupt Routing Split Option ROM PCI Interrupt Routing/Sharing Apic Interrupt RoutingInterrupt Serialized IRQ Support Legacy Interrupt SourcesInterrupt Definitions ICH5-R PXH Ioapic PCI-E Interface IRQ Scan for PciirqInterface Intr IRQ PCI Interrupt Mapping Diagram Scsi Support 4.1.1 53C1030 Summary of Features4.1 LSI* 53C1030 Dual Channel Ultra320 Scsi Controller Revision C78844-002 Zero Channel RAID IDE Support Ultra ATA/100 Sata SupportIDE Initialization Sata RAID Video SupportIntel RAID Technology Option ROM Video Modes Video Memory Interface Signal Name Type DescriptionVideo Memory Interface Column Address Select Network Interface Controller NIC EnabledDual video USB 2.0 Support NIC Connector and Status LEDsSuper I/O Chip GPIOs GPIOE11/XA10 Zzbiosrolling GPIOE45/LED2GPIOE12/XA9 XBUSA9 GPIOE13/XA8 Serial Port a Serial PortsSerial Port B Serial Port Multiplexer Logic BMC Rear RJ45 Serial B Port Configuration Removable Media Drives Bios FlashFloppy Disk Support Keyboard and Mouse Support Memory Space Configuration and Initialization1MB DOS Compatibility Region Revision C78844-002 DOS Compatibility Region Extended System Bios Add-in Card Bios and Buffer AreaSystem Bios DOS Area Extended Memory Map Revision C78844-002 Extended Memory 1.2.5 I/O Apic Configuration Space High BiosMain Memory PCI Memory Space Global Enable High Enable Tseg Enable Compatible High H System Management Mode HandlingSMM Space Table Range O Map 2 I/O MapAddress es Resource Revision Accessing Configuration Space Clock Generation and Distribution Configaddress Register System Bios Intel Server Board SE7520JR2 Bios Identification String Bios Power On Self Test Post Flash Architecture and Flash Update UtilityIntel Server Board SE7520JR2 System Bios User Interface System Diagnostic Screen Splash Screen/Diagnostic WindowSystem Activity Window Quiet Boot / OEM Splash Screen Bios Boot Popup MenuPost Activity Window Bios Setup Keyboard Command Bar Options Bios Setup UtilityPlease select boot device Localization Bios Setup, Main Menu Options Entering Bios SetupMain Menu Advanced Menu Bios Setup, Advanced Menu OptionsEnglish Bios Setup, Processor Configuration Sub-menu Options Processor Configuration Sub-menuDisabled CPU Cpuid Bios Setup IDE Configuration Menu Options IDE Configuration Sub-menuBoth A1-3rdM/A2-4thM Host & Device Mixed P-ATA-S-ATA Configuration with only Primary P-ATAATA M-S Cdrom Armd AutoSWDMA0-0 SWDMA0-1 Super I/O Configuration Sub-menu Floppy Configuration Sub-menuBios Setup, Floppy Configuration Sub-menu Selections Bios Setup, Super I/O Configuration Sub-menu USB Mass Storage Device Configuration Sub-menu USB Configuration Sub-menuBios Setup, USB Configuration Sub-menu Selections HiSpeed Bios Setup, PCI Configuration Sub-menu Selections PCI Configuration Sub-menu Bios Setup, Memory Configuration Sub-menu Selections Memory Configuration Sub-menu Bios Setup, Boot Menu Selections Boot MenuDimm 3A Dimm 3B Bios Setup, Boot Settings Configuration Sub-menu Selections Boot Settings Configuration Sub-menu SelectionsThis is Off 2.3.3 Hard Disk Drive Sub-menu Selections Boot Device Priority Sub-menu Selections2.3.4 Removable Drive Sub-menu Selections 2.3.5 Atapi Cdrom drives sub-menu selections Security Menu Bios Setup, Security Menu OptionsLimited Minute Disable BSP Bios Setup, Server Menu SelectionsServer Menu Stays Off System Management Sub-menu Selections Bios Setup, System Management Sub-menu Selections100 C78844-002 Stay On Event Log Configuration Sub-menu Selections Serial Console Features Sub-menu SelectionsBios Setup, Serial Console Features Sub-menu Selections Bios Setup, Event Log Configuration Sub-menu Selections Bios Setup, Exit Menu Selections Rolling Bios and On-line UpdatesFeature Options Help Text Exit Menu Flash Bios Flash Update UtilityRecovery Mode User Binary Area Bios Recovery Configuration Reset104 Revision C78844-002 Security OEM BinaryRevision 105 C78844-002 Operating Model Security Features Operating Model106 Revision C78844-002 Scenario #2 Scenario #1Scenario #3 107 Password Clear Jumper Operating System Boot, Sleep, and WakeExtensible Firmware Interface EFI EFI Shell Sleep and Wake Functionality Advanced Configuration and Power Interface AcpiRevision 109 C78844-002 On to Off OS absent Power Switch Off to OnOn to Off OS present On to Sleep Acpi System Sleep States Sleep to On AcpiC78844-002 111 Console Redirection PXE Bios Support112 Revision C78844-002 Revision 113 C78844-002 Suppoted Management Features by TierIntel Management 114 Revision C78844-002 Platform Management Intel Server Board SE7520JR2 PC87427 Platform Management Architecture Overview 1 5V Standby Ipmi Messaging, Commands, and Abstractions116 Revision C78844-002 Revision 117 C78844-002 Ipmi ‘Sensor Model’ Management Controllers Private Management Busses118 Revision C78844-002 Revision 119 C78844-002 120 Revision C78844-002 Revision 121 C78844-002 On-Board Platform Management Features and Functionality Server Management I2C Buses Power Control InterfacesExternal Interface to the mBMC Server Management I2C Bus ID Assignments Revision 123 C78844-002 MBMC Hardware Architecture 124 Revision C78844-002 Power Supply Interface Signals Revision 125 C78844-002 Power Supply Control Signals Power-up Sequence Power Control SourcesPower-down Sequence System Reset Control Control Panel System Reset Reset Control SourcesPower button assertion Reset button assertion Control Panel Indicators Combined power and reset button assertionPower LED SSI Power LED Operation Non-Critical Condition Fault / Status LEDDegraded Condition Chassis ID LED Reset Button Power ButtonDiagnostic Interrupt Button Control Panel NMI Chassis Intrusion Watchdog Timer Secure Mode OperationBaseboard Fan Control MBMC Peripheral SMBus SEL Erasure Sensor Data Record SDR RepositoryTimestamp Clock Initialization Agent NMI Generation Field Replaceable Unit FRU Inventory DevicesSMI Generation Event Message Reception Messaging Interfaces MBMC Self Test LAN Channel Capacity LAN InterfaceRevision 135 C78844-002 LAN Channel Capability Options Platform Event Filtering PEF Event Filtering and Alerting136 Revision C78844-002 MBMC Sensor Support Action Priority Delayed TypeAlert over LAN PEF Action Priorities 138 Revision C78844-002 Platform Sensors for On-Board Platform InstrumentationEvent Readable Sensor # Event Event Offset Assert Readable Revision 139 C78844-002Sensor Name Reading Event Data Record Type Triggers Value/Offsets Action Type Ierr 140 Revision C78844-002ID LED Revision 141 C78844-002 142 IMM BMC Sensor SupportNumber Type Triggers Deassert Offsets Sensor Event Event Offset Assert Readable 143 C78844-002 Intel Server Board SE7520JR2 Platform Management 144 Lvds Scsi FRB1, FRB2 OEMFRB3 Dimm VRM System Management Bios Smbios Wired For Management WFMVital Product Data VPD Intel Server Board SE7520JR2 Error Reporting and Handling Fault Resilient Booting FRB1 FRB1 BSP Self-Test Failures 2 FRB2 BSP Post Failures OS Watchdog Timer Operating System Load Failures 3 FRB3 BSP Reset FailuresError Reporting and Handling Intel Server Board SE7520JR2 150 Revision C78844-002 Treatment of Failed Processors AP FailuresRevision 151 C78844-002 Memory Error Handling in RAS Mode Memory Error Handling152 Revision C78844-002 Memory Error Handling mBMC vs Sahalee Memory Error Handling in non-RAS ModeRevision 153 C78844-002 Memory Error Handling in non-RAS mode Single-bit ECC Error Throttling PreventionDimm Enabling 154 Revision C78844-002 PCI Bus Error Error LoggingProcessor Bus Error SMI Handler Error Messages and Error Codes Storage Device Bios Messages Boot Bios Messages157 C78844-002 No ROM Basic 158 159 C78844-002 System Configuration Bios Messages Virus Related Bios Messages160 Eprom Miscellaneous Bios Messages Cmos Bios MessagesUSB Bios Error Messages 161 C78844-002 Smbios Bios Error Messages Post Error CodesError Codes and Messages Error Code Error Message Response C78844-002 163 0146 Insufficient Memory to Shadow PCI ROM Pause Error code Error messages Error Codes Sent to the Management Module164 Bios Generated Beep Codes Bios Generated Post Error Beep CodesRevision 165 C78844-002 Number of Beeps Description Boot Block Error Beep Codes Boot Block Error Beep CodesNumber of Beeps Troubleshooting Action BMC Generated Beep Codes Professional/Advanced only Diagnostic LEDs System ROM Bios Post Task Test Point Port 80h CodeCheckpoints Post Progress Code LED Example Post Code Checkpoints Diagnostic LEDsBack edge of baseboard Post Code Checkpoints 169 C78844-002 Bootblock Initialization Code Checkpoints Bootblock Initialization Code Checkpoints170 Revision C78844-002 Cmos Bootblock Recovery Code Checkpoint Bootblock Recovery Code Checkpoint171 C78844-002 DIM Code Checkpoints DIM Code Checkpoints172 Revision C78844-002 Checkpoint Description Acpi Runtime Checkpoints Memory Error CodesPost Progress Fifo Professional / Advanced only 174 Revision C78844-002 Light Guided Diagnostics Intel Server Board SE7520JR2 Connectors and Jumper Blocks Power ConnectorsPower Connector Pin-out 12V Power Connector J4J1 Riser Slots IDE Power Connector Pinout U2E1Low Profile PCI-X Riser Slot Low Profile Riser Slot Pinout Pin PCI Spec Description Side a Signal Pin PCI Spec Description Side SignalRevision 177 C78844-002 178 Revision C78844-002 Connectors and Jumper Blocks Intel Server Board SE7520JR2 Full Height PCI-X Riser Slot Pin connector length = 139.45mm=5.49Revision 179 C78844-002 Prsntn 180 Revision C78844-002 Pin-Side PCI Spec Description SignalREFCLK2 Perstn Revision 181 C78844-002 182 Revision C78844-002 PAR64 Revision 183 C78844-002Pxhrst IMM Connector Pinout J1C1 Intel Management Module ConnectorSystem Management Headers 184 Revision C78844-002 Description Pin C78844-002 185 186 C78844-002 Icmb Header Pin Signal Name Type DescriptionIpmb Header Icmb Header Pin-out J1D1 188 Revision C78844-002 Pin Signal Name Description OEM RMC Connector J3B2 Control Panel ConnectorsOEM RMC Connector Pinout J3B2 Pin Signal Name 190 Revision C78844-002 Pin# Signal Name Pin # Revision 191 C78844-002 Control Panel SSI Standard 34-Pin Header Pin-outP5V P5VSTBY P5VSTBY Fpidledl FPSTATUSLED1R Fpidbtnl GND Fphddfltledr VGA Connector I/O ConnectorsVGA Connector Pin-out 192 Scsi Connectors NIC ConnectorsRJ-45 10/100/1000 NIC Connector Pin-out Internal/External 68-pin Vhdci Scsi Connector Pin-out ATA-100 40-pin Connector Pin-out J3K1 ATA-100 ConnectorPin# Signal Name Signal Name Pin# Floppy Controller Connector Sata ConnectorsSata Connector Pin-out J1H1 and J1H5 Revision 195 C78844-002 External RJ-45 Serial B Port Pin-out Serial Port ConnectorsInternal 9-pin Serial a Header Pin-out J1A3 196 Revision C78844-002 USB Connector Keyboard and Mouse ConnectorExternal USB Connector Pin-out Stacked PS/2 Keyboard and Mouse Port Pin-out Internal 2x5 USB Connector J1G1 Internal 1x10 USB Connector Pin-out J1F1Fan Headers 198 Revision C78844-002 Intel Server Chassis Fan Header Pin-out J3K6 CPU1/CPU2 Fan Connector Pin-out J5F2, J7F1Revision 199 C78844-002 Chassis Intrusion Header Misc. Headers and ConnectorsHard Drive Activity LED Header Jumper Blocks SettingsJumper Block Definitions Revision 201 C78844-002 Power Supply Requirements Server Board SE7520JR2 Design SpecificationOutput Connectors Board Design Specifications Revision 203 C78844-002 Power Harness Specification Drawing P2 Processor Power Connector P1 Main Power ConnectorP1 Main Power Connector P2 Processor Power Connector P4 Peripheral Connectors P3 Power Signal ConnectorP7 Hard Drive Back Plane Power Connector Grounding Standby Outputs Remote Sense206 Revision C78844-002 Dynamic Loading Voltage RegulationVoltage Regulation Limits Transient Load Requirements Capacitive Loading Common Mode NoiseClosed Loop Stability Ripple / Noise Zero Load Stability Requirements Soft StartingTiming Requirements Output Voltage Timing 1500 210 Revision C78844-0022500 100 1000 Revision 211 C78844-002 Residual Voltage Immunity in Standby Mode Product Regulatory Compliance Product Safety ComplianceProduct EMC Compliance Class a Compliance 212 Revision C78844-002 Product Regulatory Compliance Markings Certifications / Registrations / DeclarationsProduct Certification Markings Revision 213 C78844-002 FCC USA Electromagnetic Compatibility NoticesIndustry Canada ICES-003 214 Revision C78844-002 Taiwan Declaration of Conformity Bsmi Europe CE Declaration of ConformityKorean Compliance RRL Revision 215 C78844-002 Programming FRU and SDR Data Updating the System Software216 Revision C78844-002 Cmos Clear using Control Panel Cmos Clear Using J1H2 Jumper BlockClearing Cmos Revision 217 C78844-002 218 Revision C78844-002 Bios Recovery Operation Revision 219 C78844-002 Page Revision 221 C78844-002 Appendix a Integration and Usage Tips 222 Glossary Intel Server Board SE7520JR2Term Definition C78844-002 223 Intel Server Board SE7520JR2 Glossary 224 Revision C78844-002 Revision 225 C78844-002 Intel Server Board SE7520JR2 Reference Documents

3.5.1.2Extended Memory

Figure 16. Extended Memory Map

Revision 1.0

C78844-002