202, 216, Design and Environmental Specifications | Intel SE7520JR2

Intel® Server Board SE7520JR2		Table of Contents
8. Design and Environmental Specifications		202
8.1	Server Board SE7520JR2 Design Specification	202
8.2	Power Supply Requirements	202
8.2.1	Output Connectors	202
8.2.2	Grounding	205
8.2.3	Remote Sense	206
8.2.4	Standby Outputs	206
8.2.5	Voltage Regulation	207
8.2.6	Dynamic Loading	207
8.2.7	Capacitive Loading	208
8.2.8	Closed Loop Stability	208
8.2.9	Common Mode Noise	208
8.2.10	Ripple / Noise	208
8.2.11	Soft Starting	209
8.2.12	Zero Load Stability Requirements	209
8.2.13	Timing Requirements	209
8.2.14	Residual Voltage Immunity in Standby Mode	211
8.3	Product Regulatory Compliance	212
8.3.1	Product Safety Compliance	212
8.3.2	Product EMC Compliance – Class A Compliance	212
8.3.3	Certifications / Registrations / Declarations	213
8.3.4	Product Regulatory Compliance Markings	213
8.4	Electromagnetic Compatibility Notices	214
8.4.1	FCC (USA)	214
8.4.2	Industry Canada (ICES-003)	214
8.4.3	Europe (CE Declaration of Conformity)	215
8.4.4	Taiwan Declaration of Conformity (BSMI)	215
8.4.5	Korean Compliance (RRL)	215
9. Miscellaneous Board Information		216
9.1	Updating the System Software	216
9.2	Programming FRU and SDR Data	216
9.3	Clearing CMOS	217
9.3.1	CMOS Clear Using J1H2 Jumper Block	217
9.3.2	CMOS Clear using Control Panel	217
9.4	BIOS Recovery Operation	218
Revision 1.0		xi
	C78844-002

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Intel SE7520JR2 manual 202, 216, Design and Environmental Specifications, Fcc Usa, Miscellaneous Board Information

Contents

Intel Server Board SE7520JR2 Date Revision Modifications Number Revision History Intel Server Board SE7520JR2Revision C78844-002 Intel Server Board SE7520JR2 Disclaimers Iii Table of Contents RTC Intel Server Board SE7520JR2 Table of Contents System Bios Table of Contents Intel Server Board SE7520JR2 Platform Management 113Vii Viii C78844-002 149 Error Reporting and Handling 201 175 FCC USA Design and Environmental Specifications202 216 Xii Revision C78844-002 Appendix a Integration and Usage Tips 221222 225 Xiii Intel Server Board SE7520JR2 List of Figures Xiv List of Tables Intel Server Board SE7520JR2 Intel Server Board SE7520JR2 List of Tables Xvi Xvii Xviii Revision C78844-002 This page intentionally left blank Revision C78844-002 Chapter OutlineIntel Server Board SE7520JR2 Introduction Introduction Intel Server Board SE7520JR2 Server Board Use Disclaimer Server Board SE7520JR2 SKU Availability Server Board SE7520JR2 Feature Set Server Board Overview Intel Server Board SE7520JR2 SE7520JR2 Board Layout Revision C78844-002 32 33 Ref # Description Server Board Dimensions Revision C78844-002 Functional Architecture Intel Server Board SE7520JR2 Server Board SE7520JR2 Block Diagram Revision C78844-002 Processor Module Presence Detection Reset Configuration LogicProcessor Sub-system Processor Voltage Regulators Processor Family FSB Frequency Support Common Enabling Kit CEK Design SupportProcessor Support Processor Support Matrix Mixed Processor Models Jumperless Processor Speed SettingsProcessor Mis-population Detection Mixed Processor Steppings Multiple Processor Initialization Processor Thermal Trip Shutdown Intel E7520 ChipsetCPU Thermal Sensors Processor Thermal Control Sensor PCI Express Memory Controller Hub MCHFront Side Bus FSB MCH Memory Sub-System Overview Low Profile Riser Slot PCI-X Hub PXHHub Interface Full-height Riser Slot PCI Interface 3 I/O Controller Hub ICH5-R2.3 I/OxAPIC Controller SMBus Interface Low Pin Count LPC Interface Sata Controller 3.8 RTC Enhanced Power ManagementAdvanced Programmable Interrupt Controller Apic Universal Serial Bus USB Controller Memory Sizing Memory Sub-System 1GB 2GB 4GB Memory Population1GB 2GB Supported DDR-333 Dimm Populations DDR-266 & DDR-333 Dimm population rules are as followsDDR2 400 Dimm population rules are as follows Supported DDR-266 Dimm Populations Memory Test ECC Memory Initialization Memory Monitoring Support by Server Management Level Memory Feature On-board Professional AdvancedMemory Monitoring Integrated Memory Scrub Engine Memory Rasum FeaturesDram ECC Intel x4 Single Device Data Correction x4 Sddc Integrated Memory Initialization Engine Retry on Uncorrectable Error Dimm Sparing Function Memory Mirroring Four Dimm Memory Mirror Configuration Dimm Logging Memory RAS Information to the SEL I/O Sub-SystemPCI Subsystem PCI Riser Slots 1.1 P32-A 32-bit, 33-MHz PCI Subsystem1.2 P64-A and P64-B 64-bit, 100MHz PCI Subsystem 1.3 P64-Express Dual x4 PCI Bus Segment PCI Bus Numbering PCI Scan Order Device Number and Idsel Mapping PCAD28 PCI DeviceBus# / Device# / Function# Interrupt Routing Split Option ROM Interrupt Apic Interrupt RoutingPCI Interrupt Routing/Sharing Interrupt Definitions Legacy Interrupt SourcesSerialized IRQ Support Intr IRQ Scan for PciirqICH5-R PXH Ioapic PCI-E Interface Interface IRQ PCI Interrupt Mapping Diagram 4.1 LSI* 53C1030 Dual Channel Ultra320 Scsi Controller 4.1.1 53C1030 Summary of FeaturesScsi Support Revision C78844-002 Zero Channel RAID IDE Support IDE Initialization Sata SupportUltra ATA/100 Video Modes Video SupportSata RAID Intel RAID Technology Option ROM Column Address Select Signal Name Type DescriptionVideo Memory Interface Video Memory Interface Dual video EnabledNetwork Interface Controller NIC GPIOs NIC Connector and Status LEDsUSB 2.0 Support Super I/O Chip XBUSA9 GPIOE13/XA8 Zzbiosrolling GPIOE45/LED2GPIOE11/XA10 GPIOE12/XA9 Serial Port Multiplexer Logic Serial PortsSerial Port a Serial Port B BMC Rear RJ45 Serial B Port Configuration Keyboard and Mouse Support Bios FlashRemovable Media Drives Floppy Disk Support 1MB Configuration and InitializationMemory Space DOS Compatibility Region Revision C78844-002 DOS Compatibility Region DOS Area Add-in Card Bios and Buffer AreaExtended System Bios System Bios Extended Memory Map Revision C78844-002 Extended Memory PCI Memory Space High Bios1.2.5 I/O Apic Configuration Space Main Memory Range System Management Mode HandlingGlobal Enable High Enable Tseg Enable Compatible High H SMM Space Table Address es Resource 2 I/O MapO Map Revision Accessing Configuration Space Clock Generation and Distribution Configaddress Register System Bios Intel Server Board SE7520JR2 Bios Identification String User Interface Flash Architecture and Flash Update UtilityBios Power On Self Test Post Intel Server Board SE7520JR2 System Bios System Activity Window Splash Screen/Diagnostic WindowSystem Diagnostic Screen Post Activity Window Bios Boot Popup MenuQuiet Boot / OEM Splash Screen Localization Bios Setup UtilityBios Setup Keyboard Command Bar Options Please select boot device Main Menu Entering Bios SetupBios Setup, Main Menu Options English Bios Setup, Advanced Menu OptionsAdvanced Menu CPU Cpuid Processor Configuration Sub-menuBios Setup, Processor Configuration Sub-menu Options Disabled A1-3rdM/A2-4thM IDE Configuration Sub-menuBios Setup IDE Configuration Menu Options Both ATA M-S Mixed P-ATA-S-ATA Configuration with only Primary P-ATAHost & Device SWDMA0-1 AutoCdrom Armd SWDMA0-0 Bios Setup, Super I/O Configuration Sub-menu Floppy Configuration Sub-menuSuper I/O Configuration Sub-menu Bios Setup, Floppy Configuration Sub-menu Selections HiSpeed USB Configuration Sub-menuUSB Mass Storage Device Configuration Sub-menu Bios Setup, USB Configuration Sub-menu Selections Bios Setup, PCI Configuration Sub-menu Selections PCI Configuration Sub-menu Bios Setup, Memory Configuration Sub-menu Selections Memory Configuration Sub-menu Dimm 3B Boot MenuBios Setup, Boot Menu Selections Dimm 3A Off Boot Settings Configuration Sub-menu SelectionsBios Setup, Boot Settings Configuration Sub-menu Selections This is 2.3.5 Atapi Cdrom drives sub-menu selections Boot Device Priority Sub-menu Selections2.3.3 Hard Disk Drive Sub-menu Selections 2.3.4 Removable Drive Sub-menu Selections Minute Bios Setup, Security Menu OptionsSecurity Menu Limited Stays Off Bios Setup, Server Menu SelectionsDisable BSP Server Menu Stay On Bios Setup, System Management Sub-menu SelectionsSystem Management Sub-menu Selections 100 C78844-002 Bios Setup, Event Log Configuration Sub-menu Selections Serial Console Features Sub-menu SelectionsEvent Log Configuration Sub-menu Selections Bios Setup, Serial Console Features Sub-menu Selections Exit Menu Rolling Bios and On-line UpdatesBios Setup, Exit Menu Selections Feature Options Help Text User Binary Area Flash Update UtilityFlash Bios Recovery Mode 104 Revision C78844-002 Configuration ResetBios Recovery Revision 105 C78844-002 OEM BinarySecurity 106 Revision C78844-002 Security Features Operating ModelOperating Model 107 Scenario #1Scenario #2 Scenario #3 EFI Shell Operating System Boot, Sleep, and WakePassword Clear Jumper Extensible Firmware Interface EFI Revision 109 C78844-002 Advanced Configuration and Power Interface AcpiSleep and Wake Functionality On to Sleep Acpi Power Switch Off to OnOn to Off OS absent On to Off OS present C78844-002 111 Sleep to On AcpiSystem Sleep States 112 Revision C78844-002 PXE Bios SupportConsole Redirection Intel Management Suppoted Management Features by TierRevision 113 C78844-002 114 Revision C78844-002 Platform Management Intel Server Board SE7520JR2 PC87427 Platform Management Architecture Overview 116 Revision C78844-002 Ipmi Messaging, Commands, and Abstractions1 5V Standby Revision 117 C78844-002 Ipmi ‘Sensor Model’ 118 Revision C78844-002 Private Management BussesManagement Controllers Revision 119 C78844-002 120 Revision C78844-002 Revision 121 C78844-002 On-Board Platform Management Features and Functionality Server Management I2C Bus ID Assignments Power Control InterfacesServer Management I2C Buses External Interface to the mBMC Revision 123 C78844-002 MBMC Hardware Architecture 124 Revision C78844-002 Power Supply Interface Signals Revision 125 C78844-002 Power Supply Control Signals System Reset Control Power Control SourcesPower-up Sequence Power-down Sequence Reset button assertion Reset Control SourcesControl Panel System Reset Power button assertion SSI Power LED Operation Combined power and reset button assertionControl Panel Indicators Power LED Chassis ID LED Fault / Status LEDNon-Critical Condition Degraded Condition Chassis Intrusion Power ButtonReset Button Diagnostic Interrupt Button Control Panel NMI MBMC Peripheral SMBus Secure Mode OperationWatchdog Timer Baseboard Fan Control Initialization Agent Sensor Data Record SDR RepositorySEL Erasure Timestamp Clock Event Message Reception Field Replaceable Unit FRU Inventory DevicesNMI Generation SMI Generation Messaging Interfaces MBMC Self Test LAN Channel Capability Options LAN InterfaceLAN Channel Capacity Revision 135 C78844-002 136 Revision C78844-002 Event Filtering and AlertingPlatform Event Filtering PEF PEF Action Priorities Action Priority Delayed TypeMBMC Sensor Support Alert over LAN Event Readable Platform Sensors for On-Board Platform Instrumentation138 Revision C78844-002 Value/Offsets Action Type Revision 139 C78844-002Sensor # Event Event Offset Assert Readable Sensor Name Reading Event Data Record Type Triggers ID LED 140 Revision C78844-002Ierr Revision 141 C78844-002 Sensor Event Event Offset Assert Readable IMM BMC Sensor Support142 Number Type Triggers Deassert Offsets 143 C78844-002 Intel Server Board SE7520JR2 Platform Management 144 Lvds Scsi FRB3 OEMFRB1, FRB2 Dimm VRM Vital Product Data VPD Wired For Management WFMSystem Management Bios Smbios 2 FRB2 BSP Post Failures Fault Resilient Booting FRBIntel Server Board SE7520JR2 Error Reporting and Handling 1 FRB1 BSP Self-Test Failures 150 Revision C78844-002 3 FRB3 BSP Reset FailuresOS Watchdog Timer Operating System Load Failures Error Reporting and Handling Intel Server Board SE7520JR2 Revision 151 C78844-002 AP FailuresTreatment of Failed Processors 152 Revision C78844-002 Memory Error HandlingMemory Error Handling in RAS Mode Revision 153 C78844-002 Memory Error Handling in non-RAS ModeMemory Error Handling mBMC vs Sahalee 154 Revision C78844-002 Single-bit ECC Error Throttling PreventionMemory Error Handling in non-RAS mode Dimm Enabling SMI Handler Error LoggingPCI Bus Error Processor Bus Error Error Messages and Error Codes No ROM Basic Boot Bios MessagesStorage Device Bios Messages 157 C78844-002 158 159 C78844-002 Eprom Virus Related Bios MessagesSystem Configuration Bios Messages 160 161 C78844-002 Cmos Bios MessagesMiscellaneous Bios Messages USB Bios Error Messages Error Code Error Message Response Post Error CodesSmbios Bios Error Messages Error Codes and Messages C78844-002 163 0146 Insufficient Memory to Shadow PCI ROM Pause 164 Error Codes Sent to the Management ModuleError code Error messages Number of Beeps Description Bios Generated Post Error Beep CodesBios Generated Beep Codes Revision 165 C78844-002 BMC Generated Beep Codes Professional/Advanced only Boot Block Error Beep CodesBoot Block Error Beep Codes Number of Beeps Troubleshooting Action Post Progress Code LED Example System ROM Bios Post Task Test Point Port 80h CodeDiagnostic LEDs Checkpoints Post Code Checkpoints Diagnostic LEDsPost Code Checkpoints Back edge of baseboard 169 C78844-002 Cmos Bootblock Initialization Code CheckpointsBootblock Initialization Code Checkpoints 170 Revision C78844-002 171 C78844-002 Bootblock Recovery Code CheckpointBootblock Recovery Code Checkpoint Checkpoint Description DIM Code CheckpointsDIM Code Checkpoints 172 Revision C78844-002 Post Progress Fifo Professional / Advanced only Memory Error CodesAcpi Runtime Checkpoints 174 Revision C78844-002 Light Guided Diagnostics 12V Power Connector J4J1 Power ConnectorsIntel Server Board SE7520JR2 Connectors and Jumper Blocks Power Connector Pin-out Low Profile Riser Slot Pinout IDE Power Connector Pinout U2E1Riser Slots Low Profile PCI-X Riser Slot Revision 177 C78844-002 Pin PCI Spec Description Side SignalPin PCI Spec Description Side a Signal 178 Revision C78844-002 Connectors and Jumper Blocks Intel Server Board SE7520JR2 Prsntn Pin connector length = 139.45mm=5.49Full Height PCI-X Riser Slot Revision 179 C78844-002 Perstn Pin-Side PCI Spec Description Signal180 Revision C78844-002 REFCLK2 Revision 181 C78844-002 182 Revision C78844-002 Pxhrst Revision 183 C78844-002PAR64 184 Revision C78844-002 Intel Management Module ConnectorIMM Connector Pinout J1C1 System Management Headers Description Pin C78844-002 185 186 C78844-002 Icmb Header Pin-out J1D1 Pin Signal Name Type DescriptionIcmb Header Ipmb Header 188 Revision C78844-002 Pin Signal Name Description Pin Signal Name Control Panel ConnectorsOEM RMC Connector J3B2 OEM RMC Connector Pinout J3B2 190 Revision C78844-002 Pin# Signal Name Pin # P5VSTBY Fpidledl FPSTATUSLED1R Fpidbtnl GND Fphddfltledr Control Panel SSI Standard 34-Pin Header Pin-outRevision 191 C78844-002 P5V P5VSTBY 192 I/O ConnectorsVGA Connector VGA Connector Pin-out Internal/External 68-pin Vhdci Scsi Connector Pin-out NIC ConnectorsScsi Connectors RJ-45 10/100/1000 NIC Connector Pin-out Signal Name Pin# ATA-100 ConnectorATA-100 40-pin Connector Pin-out J3K1 Pin# Signal Name Revision 195 C78844-002 Sata ConnectorsFloppy Controller Connector Sata Connector Pin-out J1H1 and J1H5 196 Revision C78844-002 Serial Port ConnectorsExternal RJ-45 Serial B Port Pin-out Internal 9-pin Serial a Header Pin-out J1A3 Stacked PS/2 Keyboard and Mouse Port Pin-out Keyboard and Mouse ConnectorUSB Connector External USB Connector Pin-out 198 Revision C78844-002 Internal 1x10 USB Connector Pin-out J1F1Internal 2x5 USB Connector J1G1 Fan Headers Revision 199 C78844-002 CPU1/CPU2 Fan Connector Pin-out J5F2, J7F1Intel Server Chassis Fan Header Pin-out J3K6 Hard Drive Activity LED Header Misc. Headers and ConnectorsChassis Intrusion Header Revision 201 C78844-002 SettingsJumper Blocks Jumper Block Definitions Board Design Specifications Server Board SE7520JR2 Design SpecificationPower Supply Requirements Output Connectors Revision 203 C78844-002 Power Harness Specification Drawing P2 Processor Power Connector P1 Main Power ConnectorP2 Processor Power Connector P1 Main Power Connector Grounding P3 Power Signal ConnectorP4 Peripheral Connectors P7 Hard Drive Back Plane Power Connector 206 Revision C78844-002 Remote SenseStandby Outputs Transient Load Requirements Voltage RegulationDynamic Loading Voltage Regulation Limits Ripple / Noise Common Mode NoiseCapacitive Loading Closed Loop Stability Output Voltage Timing Soft StartingZero Load Stability Requirements Timing Requirements 100 1000 210 Revision C78844-0021500 2500 Revision 211 C78844-002 Residual Voltage Immunity in Standby Mode 212 Revision C78844-002 Product Safety ComplianceProduct Regulatory Compliance Product EMC Compliance Class a Compliance Revision 213 C78844-002 Certifications / Registrations / DeclarationsProduct Regulatory Compliance Markings Product Certification Markings 214 Revision C78844-002 Electromagnetic Compatibility NoticesFCC USA Industry Canada ICES-003 Revision 215 C78844-002 Europe CE Declaration of ConformityTaiwan Declaration of Conformity Bsmi Korean Compliance RRL 216 Revision C78844-002 Updating the System SoftwareProgramming FRU and SDR Data Revision 217 C78844-002 Cmos Clear Using J1H2 Jumper BlockCmos Clear using Control Panel Clearing Cmos 218 Revision C78844-002 Bios Recovery Operation Revision 219 C78844-002 Page Revision 221 C78844-002 Appendix a Integration and Usage Tips Term Definition Glossary Intel Server Board SE7520JR2222 C78844-002 223 Intel Server Board SE7520JR2 Glossary 224 Revision C78844-002 Revision 225 C78844-002 Intel Server Board SE7520JR2 Reference Documents