Legacy Interrupt Sources, Serialized IRQ Support | Intel SE7520JR2

Functional Architecture

Intel® Server Board SE7520JR2

3.4.3.3Legacy Interrupt Sources

The table below recommends the logical interrupt mapping of interrupt sources on the Server Board SE7520JR2. The actual interrupt map is defined using configuration registers in the ICH5-R.

	Table 10: Interrupt Definitions

ISA	Description
Interrupt
IRQ0	Timer/counter, HPET #0 in legacy replacement Mode. In APIC mode, cascade from 8259 controller #1

IRQ1	Keyboard

IRQ2	Slave controller INTR output. In APIC mode timer/counter, HPET#0

IRQ3	Serial port A

IRQ4	Serial port B

IRQ5	Parallel Port (Not implemented)

IRQ6	Floppy

IRQ7	Parallel port, generic (Not implemented)

IRQ8	RTC/HPET#1 in legacy replacement mode

IRQ9	Generic, Option for SCI

IRQ10	Generic, Option for SCI

IRQ11	HPET#2, option for SCSI, TCO*

IRQ12	PS2 Mouse

IRQ13	FERR

IRQ14	Primary ATA, legacy mode

IRQ15	Secondary ATA, legacy mode

PIRQA	USB 2.0 Controller #1 and #4

PIRQB	Video

PIRQC	USB 2.0 Controller #3, Native IDE, S-ATA

PIRQD	USB 2.0 Controller #2

PIRQE	Option for SCI, TCO, HPET#0,1,2

PIRQF	Option for SCI, TCO, HPET#0,1,2

PIRQG	Option for SCI, TCO, HPET#0,1,2

PIRQH	USB 2.0 EHCI controller #1, option for SCI, TCO, HPET#0,1,2

Ser IRQ	SIO3

3.4.3.4Serialized IRQ Support

The Server Board SE7520JR2 supports a serialized interrupt delivery mechanism. Serialized Interrupt Requests (SERIRQ) consists of a start frame, a minimum of 17 IRQ / data channels, and a stop frame. Any slave device in quiet mode may initiate the start frame. While in continuous mode, the start frame is initiated by the host controller.

54	Revision 1.0
	C78844-002

Image 54

Intel SE7520JR2 manual Legacy Interrupt Sources, Serialized IRQ Support, Interrupt Definitions

Contents

Intel Server Board SE7520JR2 C78844-002 Revision History Intel Server Board SE7520JR2Revision Date Revision Modifications Number Iii Intel Server Board SE7520JR2 Disclaimers Table of Contents Intel Server Board SE7520JR2 Table of Contents RTC Table of Contents Intel Server Board SE7520JR2 System Bios 113 ViiPlatform Management Viii C78844-002 Error Reporting and Handling 149 175 201 216 Design and Environmental Specifications202 FCC USA 225 Appendix a Integration and Usage Tips 221222 Xii Revision C78844-002 Intel Server Board SE7520JR2 List of Figures Xiii List of Tables Intel Server Board SE7520JR2 Xiv Intel Server Board SE7520JR2 List of Tables Xvi Xvii This page intentionally left blank Xviii Revision C78844-002 Chapter Outline Intel Server Board SE7520JR2 IntroductionRevision C78844-002 Server Board Use Disclaimer Introduction Intel Server Board SE7520JR2 Server Board SE7520JR2 Feature Set Server Board SE7520JR2 SKU Availability Server Board Overview Intel Server Board SE7520JR2 32 33 SE7520JR2 Board Layout Revision C78844-002 Ref # Description Server Board Dimensions Revision C78844-002 Server Board SE7520JR2 Block Diagram Revision C78844-002 Functional Architecture Intel Server Board SE7520JR2 Processor Voltage Regulators Reset Configuration LogicProcessor Sub-system Processor Module Presence Detection Processor Support Matrix Common Enabling Kit CEK Design SupportProcessor Support Processor Family FSB Frequency Support Mixed Processor Steppings Jumperless Processor Speed SettingsProcessor Mis-population Detection Mixed Processor Models Multiple Processor Initialization Processor Thermal Control Sensor Intel E7520 ChipsetCPU Thermal Sensors Processor Thermal Trip Shutdown MCH Memory Sub-System Overview Memory Controller Hub MCHFront Side Bus FSB PCI Express Full-height Riser Slot PCI-X Hub PXHHub Interface Low Profile Riser Slot SMBus Interface 3 I/O Controller Hub ICH5-R2.3 I/OxAPIC Controller PCI Interface Sata Controller Low Pin Count LPC Interface Universal Serial Bus USB Controller Enhanced Power ManagementAdvanced Programmable Interrupt Controller Apic 3.8 RTC Memory Sub-System Memory Sizing Memory Population 1GB 2GB1GB 2GB 4GB Supported DDR-266 Dimm Populations DDR-266 & DDR-333 Dimm population rules are as followsDDR2 400 Dimm population rules are as follows Supported DDR-333 Dimm Populations ECC Memory Initialization Memory Test Memory Feature On-board Professional Advanced Memory MonitoringMemory Monitoring Support by Server Management Level Memory Rasum Features Dram ECC Intel x4 Single Device Data Correction x4 SddcIntegrated Memory Scrub Engine Retry on Uncorrectable Error Integrated Memory Initialization Engine Dimm Sparing Function Four Dimm Memory Mirror Configuration Memory Mirroring Dimm I/O Sub-System PCI SubsystemLogging Memory RAS Information to the SEL 1.3 P64-Express Dual x4 PCI Bus Segment 1.1 P32-A 32-bit, 33-MHz PCI Subsystem1.2 P64-A and P64-B 64-bit, 100MHz PCI Subsystem PCI Riser Slots PCI Scan Order PCI Bus Numbering Device Number and Idsel Mapping PCI Device Bus# / Device# / Function#PCAD28 Split Option ROM Interrupt Routing Apic Interrupt Routing PCI Interrupt Routing/SharingInterrupt Legacy Interrupt Sources Serialized IRQ SupportInterrupt Definitions Interface IRQ Scan for PciirqICH5-R PXH Ioapic PCI-E Interface Intr IRQ PCI Interrupt Mapping Diagram 4.1.1 53C1030 Summary of Features Scsi Support4.1 LSI* 53C1030 Dual Channel Ultra320 Scsi Controller Revision C78844-002 IDE Support Zero Channel RAID Sata Support Ultra ATA/100IDE Initialization Intel RAID Technology Option ROM Video SupportSata RAID Video Modes Video Memory Interface Signal Name Type DescriptionVideo Memory Interface Column Address Select Enabled Network Interface Controller NICDual video Super I/O Chip NIC Connector and Status LEDsUSB 2.0 Support GPIOs GPIOE12/XA9 Zzbiosrolling GPIOE45/LED2GPIOE11/XA10 XBUSA9 GPIOE13/XA8 Serial Port B Serial PortsSerial Port a Serial Port Multiplexer Logic Rear RJ45 Serial B Port Configuration BMC Floppy Disk Support Bios FlashRemovable Media Drives Keyboard and Mouse Support Configuration and Initialization Memory Space1MB DOS Compatibility Region DOS Compatibility Region Revision C78844-002 System Bios Add-in Card Bios and Buffer AreaExtended System Bios DOS Area Extended Memory Extended Memory Map Revision C78844-002 Main Memory High Bios1.2.5 I/O Apic Configuration Space PCI Memory Space SMM Space Table System Management Mode HandlingGlobal Enable High Enable Tseg Enable Compatible High H Range 2 I/O Map O MapAddress es Resource Revision Accessing Configuration Space Configaddress Register Clock Generation and Distribution Bios Identification String System Bios Intel Server Board SE7520JR2 Intel Server Board SE7520JR2 System Bios Flash Architecture and Flash Update UtilityBios Power On Self Test Post User Interface Splash Screen/Diagnostic Window System Diagnostic ScreenSystem Activity Window Bios Boot Popup Menu Quiet Boot / OEM Splash ScreenPost Activity Window Please select boot device Bios Setup UtilityBios Setup Keyboard Command Bar Options Localization Entering Bios Setup Bios Setup, Main Menu OptionsMain Menu Bios Setup, Advanced Menu Options Advanced MenuEnglish Disabled Processor Configuration Sub-menuBios Setup, Processor Configuration Sub-menu Options CPU Cpuid Both IDE Configuration Sub-menuBios Setup IDE Configuration Menu Options A1-3rdM/A2-4thM Mixed P-ATA-S-ATA Configuration with only Primary P-ATA Host & DeviceATA M-S SWDMA0-0 AutoCdrom Armd SWDMA0-1 Bios Setup, Floppy Configuration Sub-menu Selections Floppy Configuration Sub-menuSuper I/O Configuration Sub-menu Bios Setup, Super I/O Configuration Sub-menu Bios Setup, USB Configuration Sub-menu Selections USB Configuration Sub-menuUSB Mass Storage Device Configuration Sub-menu HiSpeed PCI Configuration Sub-menu Bios Setup, PCI Configuration Sub-menu Selections Memory Configuration Sub-menu Bios Setup, Memory Configuration Sub-menu Selections Dimm 3A Boot MenuBios Setup, Boot Menu Selections Dimm 3B This is Boot Settings Configuration Sub-menu SelectionsBios Setup, Boot Settings Configuration Sub-menu Selections Off 2.3.4 Removable Drive Sub-menu Selections Boot Device Priority Sub-menu Selections2.3.3 Hard Disk Drive Sub-menu Selections 2.3.5 Atapi Cdrom drives sub-menu selections Limited Bios Setup, Security Menu OptionsSecurity Menu Minute Server Menu Bios Setup, Server Menu SelectionsDisable BSP Stays Off 100 C78844-002 Bios Setup, System Management Sub-menu SelectionsSystem Management Sub-menu Selections Stay On Bios Setup, Serial Console Features Sub-menu Selections Serial Console Features Sub-menu SelectionsEvent Log Configuration Sub-menu Selections Bios Setup, Event Log Configuration Sub-menu Selections Feature Options Help Text Rolling Bios and On-line UpdatesBios Setup, Exit Menu Selections Exit Menu Recovery Mode Flash Update UtilityFlash Bios User Binary Area Configuration Reset Bios Recovery104 Revision C78844-002 OEM Binary SecurityRevision 105 C78844-002 Security Features Operating Model Operating Model106 Revision C78844-002 Scenario #3 Scenario #1Scenario #2 107 Extensible Firmware Interface EFI Operating System Boot, Sleep, and WakePassword Clear Jumper EFI Shell Advanced Configuration and Power Interface Acpi Sleep and Wake FunctionalityRevision 109 C78844-002 On to Off OS present Power Switch Off to OnOn to Off OS absent On to Sleep Acpi Sleep to On Acpi System Sleep StatesC78844-002 111 PXE Bios Support Console Redirection112 Revision C78844-002 Suppoted Management Features by Tier Revision 113 C78844-002Intel Management Platform Management Intel Server Board SE7520JR2 114 Revision C78844-002 Platform Management Architecture Overview PC87427 Ipmi Messaging, Commands, and Abstractions 1 5V Standby116 Revision C78844-002 Ipmi ‘Sensor Model’ Revision 117 C78844-002 Private Management Busses Management Controllers118 Revision C78844-002 Revision 119 C78844-002 120 Revision C78844-002 On-Board Platform Management Features and Functionality Revision 121 C78844-002 External Interface to the mBMC Power Control InterfacesServer Management I2C Buses Server Management I2C Bus ID Assignments MBMC Hardware Architecture Revision 123 C78844-002 Power Supply Interface Signals 124 Revision C78844-002 Power Supply Control Signals Revision 125 C78844-002 Power-down Sequence Power Control SourcesPower-up Sequence System Reset Control Power button assertion Reset Control SourcesControl Panel System Reset Reset button assertion Power LED Combined power and reset button assertionControl Panel Indicators SSI Power LED Operation Degraded Condition Fault / Status LEDNon-Critical Condition Chassis ID LED Diagnostic Interrupt Button Control Panel NMI Power ButtonReset Button Chassis Intrusion Baseboard Fan Control Secure Mode OperationWatchdog Timer MBMC Peripheral SMBus Timestamp Clock Sensor Data Record SDR RepositorySEL Erasure Initialization Agent SMI Generation Field Replaceable Unit FRU Inventory DevicesNMI Generation Event Message Reception MBMC Self Test Messaging Interfaces Revision 135 C78844-002 LAN InterfaceLAN Channel Capacity LAN Channel Capability Options Event Filtering and Alerting Platform Event Filtering PEF136 Revision C78844-002 Alert over LAN Action Priority Delayed TypeMBMC Sensor Support PEF Action Priorities Platform Sensors for On-Board Platform Instrumentation 138 Revision C78844-002Event Readable Sensor Name Reading Event Data Record Type Triggers Revision 139 C78844-002Sensor # Event Event Offset Assert Readable Value/Offsets Action Type 140 Revision C78844-002 IerrID LED Revision 141 C78844-002 Number Type Triggers Deassert Offsets IMM BMC Sensor Support142 Sensor Event Event Offset Assert Readable Intel Server Board SE7520JR2 Platform Management 143 C78844-002 144 Lvds Scsi OEM FRB1, FRB2FRB3 VRM Dimm Wired For Management WFM System Management Bios SmbiosVital Product Data VPD 1 FRB1 BSP Self-Test Failures Fault Resilient Booting FRBIntel Server Board SE7520JR2 Error Reporting and Handling 2 FRB2 BSP Post Failures Error Reporting and Handling Intel Server Board SE7520JR2 3 FRB3 BSP Reset FailuresOS Watchdog Timer Operating System Load Failures 150 Revision C78844-002 AP Failures Treatment of Failed ProcessorsRevision 151 C78844-002 Memory Error Handling Memory Error Handling in RAS Mode152 Revision C78844-002 Memory Error Handling in non-RAS Mode Memory Error Handling mBMC vs SahaleeRevision 153 C78844-002 Dimm Enabling Single-bit ECC Error Throttling PreventionMemory Error Handling in non-RAS mode 154 Revision C78844-002 Processor Bus Error Error LoggingPCI Bus Error SMI Handler Error Messages and Error Codes 157 C78844-002 Boot Bios MessagesStorage Device Bios Messages No ROM Basic 158 159 C78844-002 160 Virus Related Bios MessagesSystem Configuration Bios Messages Eprom USB Bios Error Messages Cmos Bios MessagesMiscellaneous Bios Messages 161 C78844-002 Error Codes and Messages Post Error CodesSmbios Bios Error Messages Error Code Error Message Response 0146 Insufficient Memory to Shadow PCI ROM Pause C78844-002 163 Error Codes Sent to the Management Module Error code Error messages164 Revision 165 C78844-002 Bios Generated Post Error Beep CodesBios Generated Beep Codes Number of Beeps Description Number of Beeps Troubleshooting Action Boot Block Error Beep CodesBoot Block Error Beep Codes BMC Generated Beep Codes Professional/Advanced only Checkpoints System ROM Bios Post Task Test Point Port 80h CodeDiagnostic LEDs Post Progress Code LED Example Back edge of baseboard Diagnostic LEDsPost Code Checkpoints Post Code Checkpoints 169 C78844-002 170 Revision C78844-002 Bootblock Initialization Code CheckpointsBootblock Initialization Code Checkpoints Cmos Bootblock Recovery Code Checkpoint Bootblock Recovery Code Checkpoint171 C78844-002 172 Revision C78844-002 DIM Code CheckpointsDIM Code Checkpoints Checkpoint Description Memory Error Codes Acpi Runtime CheckpointsPost Progress Fifo Professional / Advanced only Light Guided Diagnostics 174 Revision C78844-002 Power Connector Pin-out Power ConnectorsIntel Server Board SE7520JR2 Connectors and Jumper Blocks 12V Power Connector J4J1 Low Profile PCI-X Riser Slot IDE Power Connector Pinout U2E1Riser Slots Low Profile Riser Slot Pinout Pin PCI Spec Description Side Signal Pin PCI Spec Description Side a SignalRevision 177 C78844-002 Connectors and Jumper Blocks Intel Server Board SE7520JR2 178 Revision C78844-002 Revision 179 C78844-002 Pin connector length = 139.45mm=5.49Full Height PCI-X Riser Slot Prsntn REFCLK2 Pin-Side PCI Spec Description Signal180 Revision C78844-002 Perstn Revision 181 C78844-002 182 Revision C78844-002 Revision 183 C78844-002 PAR64Pxhrst System Management Headers Intel Management Module ConnectorIMM Connector Pinout J1C1 184 Revision C78844-002 C78844-002 185 Description Pin 186 C78844-002 Ipmb Header Pin Signal Name Type DescriptionIcmb Header Icmb Header Pin-out J1D1 Pin Signal Name Description 188 Revision C78844-002 OEM RMC Connector Pinout J3B2 Control Panel ConnectorsOEM RMC Connector J3B2 Pin Signal Name Pin# Signal Name Pin # 190 Revision C78844-002 P5V P5VSTBY Control Panel SSI Standard 34-Pin Header Pin-outRevision 191 C78844-002 P5VSTBY Fpidledl FPSTATUSLED1R Fpidbtnl GND Fphddfltledr VGA Connector Pin-out I/O ConnectorsVGA Connector 192 RJ-45 10/100/1000 NIC Connector Pin-out NIC ConnectorsScsi Connectors Internal/External 68-pin Vhdci Scsi Connector Pin-out Pin# Signal Name ATA-100 ConnectorATA-100 40-pin Connector Pin-out J3K1 Signal Name Pin# Sata Connector Pin-out J1H1 and J1H5 Sata ConnectorsFloppy Controller Connector Revision 195 C78844-002 Internal 9-pin Serial a Header Pin-out J1A3 Serial Port ConnectorsExternal RJ-45 Serial B Port Pin-out 196 Revision C78844-002 External USB Connector Pin-out Keyboard and Mouse ConnectorUSB Connector Stacked PS/2 Keyboard and Mouse Port Pin-out Fan Headers Internal 1x10 USB Connector Pin-out J1F1Internal 2x5 USB Connector J1G1 198 Revision C78844-002 CPU1/CPU2 Fan Connector Pin-out J5F2, J7F1 Intel Server Chassis Fan Header Pin-out J3K6Revision 199 C78844-002 Misc. Headers and Connectors Chassis Intrusion HeaderHard Drive Activity LED Header Jumper Block Definitions SettingsJumper Blocks Revision 201 C78844-002 Output Connectors Server Board SE7520JR2 Design SpecificationPower Supply Requirements Board Design Specifications Power Harness Specification Drawing Revision 203 C78844-002 P1 Main Power Connector P1 Main Power ConnectorP2 Processor Power Connector P2 Processor Power Connector P7 Hard Drive Back Plane Power Connector P3 Power Signal ConnectorP4 Peripheral Connectors Grounding Remote Sense Standby Outputs206 Revision C78844-002 Voltage Regulation Limits Voltage RegulationDynamic Loading Transient Load Requirements Closed Loop Stability Common Mode NoiseCapacitive Loading Ripple / Noise Timing Requirements Soft StartingZero Load Stability Requirements Output Voltage Timing 2500 210 Revision C78844-0021500 100 1000 Residual Voltage Immunity in Standby Mode Revision 211 C78844-002 Product EMC Compliance Class a Compliance Product Safety ComplianceProduct Regulatory Compliance 212 Revision C78844-002 Product Certification Markings Certifications / Registrations / DeclarationsProduct Regulatory Compliance Markings Revision 213 C78844-002 Industry Canada ICES-003 Electromagnetic Compatibility NoticesFCC USA 214 Revision C78844-002 Korean Compliance RRL Europe CE Declaration of ConformityTaiwan Declaration of Conformity Bsmi Revision 215 C78844-002 Updating the System Software Programming FRU and SDR Data216 Revision C78844-002 Clearing Cmos Cmos Clear Using J1H2 Jumper BlockCmos Clear using Control Panel Revision 217 C78844-002 Bios Recovery Operation 218 Revision C78844-002 Revision 219 C78844-002 Page Appendix a Integration and Usage Tips Revision 221 C78844-002 Glossary Intel Server Board SE7520JR2 222Term Definition Intel Server Board SE7520JR2 Glossary C78844-002 223 224 Revision C78844-002 Intel Server Board SE7520JR2 Reference Documents Revision 225 C78844-002