Motorola MC9S12GC-Family, MC9S12C-Family Table C-4 Expanded Bus Timing Characteristics 5V Range

Device User Guide — 9S12C128DGV1/D V01.05

Table C-4 Expanded Bus Timing Characteristics (5V Range)

Conditions are 4.75V < VDDX < 5.25V, Junction Temperature -40˚C to +140˚C, CLOAD = 50pF

Num

C

Rating

Symbol

Min

Typ

Max

Unit

1

P

Frequency of operation (E-clock)

fo

0

25.0

MHz

2

P

Cycle time

tcyc

40

ns

3

D

Pulse width, E low

PWEL

19

ns

4

D

Pulse width, E high1

PWEH

19

ns

5

D

Address delay time

tAD

8

ns

6

D

Address valid time to E rise (PWEL–tAD)

tAV

11

ns

7

D

Muxed address hold time

tMAH

2

ns

8

D

Address hold to data valid

tAHDS

7

ns

9

D

Data hold to address

tDHA

2

ns

10

D

Read data setup time

tDSR

13

ns

11

D

Read data hold time

tDHR

0

ns

12

D

Write data delay time

tDDW

7

ns

13

D

Write data hold time

tDHW

2

ns

14

D

Write data setup time(1) (PWEH–tDDW)

tDSW

12

ns

15

D

Address access time(1) (t

cyc

–t

AD

–t

)

tACCA

19

ns

DSR

16

D

E high access time(1) (PW

EH

–t

DSR

)

tACCE

6

ns

17

D

Read/write delay time

tRWD

7

ns

18

D

Read/write valid time to E rise (PWEL–tRWD)

tRWV

14

ns

19

D

Read/write hold time

tRWH

2

ns

20

D

Low strobe delay time

tLSD

7

ns

21

D

Low strobe valid time to E rise (PWEL–tLSD)

tLSV

14

ns

22

D

Low strobe hold time

tLSH

2

ns

23

D

NOACC strobe delay time

tNOD

7

ns

24

D

NOACC valid time to E rise (PWEL–tLSD)

tNOV

14

ns

25

D

NOACC hold time

tNOH

2

ns

26

D

IPIPO[1:0] delay time

tP0D

2

7

ns

27

D

IPIPO[1:0] valid time to E rise (PWEL–tP0D)

tP0V

11

ns

28

D

IPIPO[1:0] delay time(1) (PW

EH

-t

)

tP1D

2

25

ns

P1V

29

D

IPIPO[1:0] valid time to E fall

tP1V

11

ns

NOTES:

1. Affected by clock stretch: add N x tcyc where N=0,1,2 or 3, depending on the number of clock stretches.

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