MuxOneNAND2G(KFM2G16Q2A-DEBx)

FLASH MEMORY

MuxOneNAND4G(KFN4G16Q2A-DEBx)

2X Program Operation Flow Diagram

Start

 

Select DataRAM for DDP1)

 

Add: F101h DQ=DBS*

 

Write Data into DataRAM2)

 

ADD: DP DQ=Data-in

 

Data Input

NO

Completed?

 

YES

 

Write ‘DFS*, FBA’ of Flash

 

Add: F100h DQ=DFS*, FBA3)

 

Write ‘FPA, FSA’ of Flash

 

Add: F107h DQ=FPA, FSA4)

 

Write ‘BSA, BSC’ of DataRAM4)

 

Add: F200h DQ=BSA, BSC

 

* DBS, DFS is for DDP

Write 0 to interrupt register5)

Add: F241h DQ=0000h

Write ‘2X Program’ Command

Add: F220h DQ=007Dh

Wait for INT register low to high transition

Add: F241h DQ[15]=INT

Read Interrupt register Add: F241h DQ[6]=WI

DQ[6]=1?

YES

Read Controller

Status Register

Add: F240h DQ[10]=Error

DQ[10]=0?

YES

Program completed

NO

Read Controller

Status Register ‘Lock’ bit high

 

Add: F240h DQ[14]=Lock

Program Lock Error

NO

Program Error

*

: If program operation results in an error, map out

the block including the page in error and copy the

 

target data to another block.

NOTE :

1)DBS must be set before data input.

2)Data input could be done anywhere between "Start" and "Write Program Command"

3)FBA must be an even block.

4)These registers must be set as BSA=1000, BSC=00 and FSA=00.

5)‘Write 0 to interrupt register’ step may be ignored when using INT auto mode. Refer to chapter 2.8.18.1

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Samsung KFM2G16Q2A, KFN4G16Q2A warranty 2X Program Operation Flow Diagram, Add F100h DQ=DFS*, FBA, Add F220h DQ=007Dh, 108