Samsung KFM2G16Q2A, KFN4G16Q2A warranty DBS, DFS is for DDP, 110

MuxOneNAND2G(KFM2G16Q2A-DEBx)

FLASH MEMORY

MuxOneNAND4G(KFN4G16Q2A-DEBx)

2X Cache Program Operation Flow Diagram

Start

Select DataRAM for DDP1)

Write Data into DataRAM0,1

NO

Add: F101h DQ=DBS

Last 2Plane PGM?

Add: DataRAM DQ=Data(4KB)

Write Data into DataRAM0,1

Write ‘DFS, FBA’ of Flash

Write Data into DataRAM0,1

Add: DataRAM DQ=Data(4KB)

Add: F100h DQ=DFS, FBA2)

Add: DataRAM DQ=Data(4KB)

Write ‘DFS, FBA’ of Flash

Write ‘FPA, FSA’ of Flash

Add: F100h DQ=DFS, FBA

2)

Add: F107h DQ=FPA, FSA3)

Write ‘DFS, FBA’ of Flash

Add: F100h DQ=DFS, FBA2)

Write ‘FPA, FSA’ of Flash

Write ‘BSA’, ‘BSC’ of Flash3)

Write ‘FPA, FSA’ of Flash

Add: F107h DQ=FPA, FSA3)

Add: F200h DQ=BSA, BSC

Add: F107h DQ=FPA, FSA3)

Write ‘BSA’, ‘BSC’ of Flash4)

Write 0 to interrupt register4)

Write ‘BSA’, ‘BSC’ of Flash3)

Add: F200h DQ=BSA, BSC

Add: F241h DQ=0000h

Add: F200h DQ=BSA, BSC

Write 0 to interrupt register5)

Write 2X Cache PGM CMD

Write 0 to interrupt register4)

Add: F241h DQ=0000h

Add: F220h DQ=007Fh

Add: F241h DQ=0000h

Write 2X Cache PGM CMD

Wait for INT register

Write 2X PGM CMD

Add: F220h DQ=007Fh

low to high transition

Add: F241h DQ=8040h

Add: F220h DQ=007Dh

Wait for INT register

Wait for INT register

low to high transition

Read Controller

low to high transition

Add: F241h DQ=8040h

Status Register

Add: F241h DQ=INT

Add: F240h DQ[10]=Error

* DBS, DFS is for DDP

NO

Read Interrupt register

DQ[10]=0?

Add: F241h DQ[6]=WI

(DFS must be same)

YES

*

: If program operation results in an error,

DQ[6]=1?

map out the block including the page

YES

NO

in error and copy the target data to another

block.

Read Controller

Read Controller

Status Register

Status Register ‘Lock’ bit high

Add: F240h DQ[10]=Error

Add: F240h DQ[14]=Lock

NO

NO

DQ[10]=0?

Map Out

YES

Program Lock Error

Program completed

NOTE :

1)DBS must be set before data input.

2)FBA must be an even block.

3)These registers must be set as BSA=1000, BSC=00 and FSA=00.

4)‘Write 0 to interrupt register’ step may be ignored when using INT auto mode. Refer to chapter 2.8.18.1.

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