KFM2G16Q2A KFN4G16Q2A
Revision No History
Initial issue Jul
Revision No
NOR
Flash Product Type Selector
PKG
Nand
Architectural Benefits
Ordering Information
System Hardware
Product Features
Device Architecture
Device Performance
General Overview
Detailed Product Description
Error Correction Code
Definitions
1 2Gb Product KFM2G16Q2A
Pin Configuration
2 4Gb Product KFN4G16Q2A
Pin Description
OTP
Block Diagram
Memory Array Organization
Internal Nand Array Memory Organization
Internal Memory Array Organization
Internal Memory Array Information Area Block Sector
Total Size 1KB+32B 2KB+64B
External BufferRAM Memory
Internal Nand Array Memory
External BufferRAM Memory Organization
BootRAM
BootRAM DataRAM0 DataRAM1 Main area data
BootRAM DataRAM
Block Block Address Sector Size
Memory Map
Block Block Address
0083h 0000h~00FFh 128KB Block163
0080h 0000h~00FFh 128KB Block160
0081h 0000h~00FFh 128KB Block161
0082h 0000h~00FFh 128KB Block162
00E2h 0000h~00FFh 128KB Block195 00C3h
Block192 00C0h 0000h~00FFh 128KB
00E0h 0000h~00FFh 128KB Block193 00C1h
00E1h 0000h~00FFh 128KB Block194 00C2h
0103h 0000h~00FFh 128KB Block291 0123h
0100h 0000h~00FFh 128KB Block288 0120h
0101h 0000h~00FFh 128KB Block289 0121h
0102h 0000h~00FFh 128KB Block290 0122h
0143h 0000h~00FFh 128KB Block355 0163h
0140h 0000h~00FFh 128KB Block352 0160h
0141h 0000h~00FFh 128KB Block353 0161h
0142h 0000h~00FFh 128KB Block354 0162h
0000h~00FFh 128KB Block387 0183h Block419
Block384 0180h 0000h~00FFh 128KB Block416
0000h~00FFh 128KB Block385 0181h Block417
0000h~00FFh 128KB Block386 0182h Block418
01E1h 0000h~00FFh 128KB
01C0h 0000h~00FFh 128KB
01E0h 0000h~00FFh 128KB
01C1h 0000h~00FFh 128KB
0203h 0000h~00FFh 128KB Block547 0223h
0200h 0000h~00FFh 128KB Block544 0220h
0201h 0000h~00FFh 128KB Block545 0221h
0202h 0000h~00FFh 128KB Block546 0222h
0243h 0000h~00FFh 128KB
0240h 0000h~00FFh 128KB Block608 0260h
0241h 0000h~00FFh 128KB Block609 0261h
0242h 0000h~00FFh 128KB Block610 0262h
0283h 0000h~00FFh 128KB Block675
0280h 0000h~00FFh 128KB Block672
0281h 0000h~00FFh 128KB Block673
0282h 0000h~00FFh 128KB Block674
02E2h 0000h~00FFh 128KB Block707 02C3h
Block704 02C0h 0000h~00FFh 128KB
02E0h 0000h~00FFh 128KB Block705 02C1h
02E1h 0000h~00FFh 128KB Block706 02C2h
0303h 0000h~00FFh 128KB Block803 0323h
0300h 0000h~00FFh 128KB Block800 0320h
0301h 0000h~00FFh 128KB Block801 0321h
0302h 0000h~00FFh 128KB Block802 0322h
0343h 0000h~00FFh 128KB Block867 0363h
0340h 0000h~00FFh 128KB Block864 0360h
0341h 0000h~00FFh 128KB Block865 0361h
0342h 0000h~00FFh 128KB Block866 0362h
0000h~00FFh 128KB Block899 0383h Block931
Block896 0380h 0000h~00FFh 128KB Block928
0000h~00FFh 128KB Block897 0381h Block929
0000h~00FFh 128KB Block898 0382h Block930
03E1h 0000h~00FFh 128KB
03C0h 0000h~00FFh 128KB
03E0h 0000h~00FFh 128KB
03C1h 0000h~00FFh 128KB
0403h 0000h~00FFh 128KB Block1059 0423h
0400h 0000h~00FFh 128KB Block1056 0420h
0401h 0000h~00FFh 128KB Block1057 0421h
0402h 0000h~00FFh 128KB Block1058 0422h
0461h 0000h~00FFh 128KB
0440h 0000h~00FFh 128KB
0460h 0000h~00FFh 128KB
0441h 0000h~00FFh 128KB
0483h 0000h~00FFh 128KB
0480h 0000h~00FFh 128KB
0481h 0000h~00FFh 128KB
0482h 0000h~00FFh 128KB
04C3h 0000h~00FFh 128KB Block1251 04E3h
04C0h 0000h~00FFh 128KB Block1248 04E0h
04C1h 0000h~00FFh 128KB Block1249 04E1h
04C2h 0000h~00FFh 128KB Block1250 04E2h
0503h 0000h~00FFh 128KB Block1315 0523h
0500h 0000h~00FFh 128KB Block1312 0520h
0501h 0000h~00FFh 128KB Block1313 0521h
0502h 0000h~00FFh 128KB Block1314 0522h
0543h 0000h~00FFh 128KB Block1379 0563h
0540h 0000h~00FFh 128KB Block1376 0560h
0541h 0000h~00FFh 128KB Block1377 0561h
0542h 0000h~00FFh 128KB Block1378 0562h
0583h 0000h~00FFh 128KB Block1443
0580h 0000h~00FFh 128KB Block1440
0581h 0000h~00FFh 128KB Block1441
0582h 0000h~00FFh 128KB Block1442
05C3h 0000h~00FFh 128KB Block1507 05E3h
05C0h 0000h~00FFh 128KB Block1504 05E0h
05C1h 0000h~00FFh 128KB Block1505 05E1h
05C2h 0000h~00FFh 128KB Block1506 05E2h
0603h 0000h~00FFh 128KB Block1571 0623h
0600h 0000h~00FFh 128KB Block1568 0620h
0601h 0000h~00FFh 128KB Block1569 0621h
0602h 0000h~00FFh 128KB Block1570 0622h
0643h 0000h~00FFh 128KB Block1635 0663h
0640h 0000h~00FFh 128KB Block1632 0660h
0641h 0000h~00FFh 128KB Block1633 0661h
0642h 0000h~00FFh 128KB Block1634 0662h
0683h 0000h~00FFh 128KB Block1699
0680h 0000h~00FFh 128KB Block1696
0681h 0000h~00FFh 128KB Block1697
0682h 0000h~00FFh 128KB Block1698
06C3h 0000h~00FFh 128KB Block1763 06E3h
06C0h 0000h~00FFh 128KB Block1760 06E0h
06C1h 0000h~00FFh 128KB Block1761 06E1h
06C2h 0000h~00FFh 128KB Block1762 06E2h
0703h 0000h~00FFh 128KB Block1827 0723h
0700h 0000h~00FFh 128KB Block1824 0720h
0701h 0000h~00FFh 128KB Block1825 0721h
0702h 0000h~00FFh 128KB Block1826 0722h
0743h 0000h~00FFh 128KB Block1891 0763h
0740h 0000h~00FFh 128KB Block1888 0760h
0741h 0000h~00FFh 128KB Block1889 0761h
0742h 0000h~00FFh 128KB Block1890 0762h
0000h~00FFh 128KB Block1923 0783h Block1955
Block1920 0780h 0000h~00FFh 128KB Block1952
0000h~00FFh 128KB Block1921 0781h Block1953
0000h~00FFh 128KB Block1922 0782h Block1954
07C3h 0000h~00FFh 128KB Block2019 07E3h
07C0h 0000h~00FFh 128KB Block2016 07E0h
07C1h 0000h~00FFh 128KB Block2017 07E1h
07C2h 0000h~00FFh 128KB Block2018 07E2h
Word Byte
Lnternal Memory Spare Area Assignment
Division Address Size Usage Description
External Memory BufferRAM Address Map
0800h~08FFh512B 0900h~09FFh512B DataM
External Memory Map Detail Information
8048h~804Fh16B
Buf
External Memory Spare Area Assignment
8028h 10050h 8029h 10052h Managed by Internal ECC logic
Managed by Internal ECC logic DataS 8023h 10046h
ECC Code for Main area data 3rd 8026h 1004Ch
8027h 1004Eh
Managed by Internal ECC logic
Buf Word Byte
8048h
8049h
Register Address Map
Registers
Address Name Host Description
Manufacturer ID Register F000h R
DeviceID150
Device ID Default
Device ID Register F001h R
Device Identification Description
This Register is reserved for internal use
F003h, default = 0800h DataBufSize
Version ID Register F002h
Data Buffer Size Register F003h R
Number of Buffers Register F005h R
Boot Buffer Size Register F004h R
Technology Register F006h R
Start Address2 Register F101h R/W
Start Address1 Register F100h R/W
Fcpa FCSA1
Start Address3 Register F102h R/W
Start Address4 Register F103h R/W
Fcba
Start Address8 Register F107h R/W
Start Address5 Register F104h R/W
Start Address6 Register F105h
Start Address7 Register F106h
BSA
Start Buffer Register F200h R/W
BSC
Operation
Command Register F220h R/W
Acceptable
CMD
Write command into INT will automatically
Two Methods to Clear Interrupt Register in Command Input
Interrupt Register
Brwl
System Configuration 1 Register F221h R, R/W
INT Polarity INTpol Information6
Burst Length BL
Burst Length BL Information119 Definition Description
RDY Polarity RDYpol Information7
Iobe
Bwps
Write Mode WM
Write Mode Information1 Definition
MRSMode register Setting Description Mode Description
Controller Status Register F240h R
System Configuration 2 Register F222h
Program
= ready default
Error
Error Information10 Sector/Page Load/Program/CopyBack
Otpl
Rstb
Otpbl
Time Out to
Plane1 Current
Plane2 Previous
Plane2 Current
Controller Status Register Output Modes
Flash Memory
INT
Interrupt Status Register F241h R/W
Rsti
Rsti Interrupt Status Conditions Default State Valid
Default State Valid
EI Interrupt Status Conditions Default State Valid
Reset Interrupt Rsti
SBA
Start Block Address Register F24Ch R/W
End Block Address Register F24Dh
Nand Flash Write Protection Status Register F24Eh R
ECC Information150
Error Status ERm, ERs ECC Status
ECC Status Register FF00h R
ERm3 ERs3 ERm2 ERs2 ERm1 ERs1 ERm0 ERs01
Reserved0000000000 ECClogSector1 ECCposIO1
Reserved0000 ECCposWord0 ECCposIO0
Reserved0000000000 ECClogSector0 ECCposIO0
Reserved0000 ECCposWord1 ECCposIO1
Reserved0000000000 ECClogSector3 ECCposIO3
Reserved0000 ECCposWord2 ECCposIO2
Reserved0000000000 ECClogSector2 ECCposIO2
Reserved0000 ECCposWord3 ECCposIO3
ECC Log Sector
ECClogSector Information Error Position
Reset MuxOneNAND Add BP1 Data 00F0h
Command Based Operation
Add Data 00E0h 0000h3 Read Identification Data XXXXh4 0090h
Identification Data Description Address Data Out
Reset MuxOneNAND Command
Load MuxOneNAND Command
Read Identification Data Command
Operation ADQ0~15
Device Bus Operation
CLK AVD
Reset Mode Operation
Nand Flash Core Reset Mode Operation
Cold Reset Mode Operation
Warm Reset Mode Operation
Hot Reset Mode Operation
Nand Array Write Protection States
BootRAM Write Protection Operation
Write Protection Operation
Nand Flash Array Write Protection Operation
Unlocked Nand Array Write Protection State
Unlocked Unlock Command Sequence
Unlocked All Block Unlock Command Sequence
Locked Lock Command Sequence
Locked-tight Nand Array Write Protection State
Nand Flash Array Write Protection State Diagram
Locked-tight Lock-Tight Command Sequence
Power On
Add F24Ch DQ=SBA
Data Protection Operation Flow Diagram
Add F101h DQ=DBS
Add F100h DQ=DFS
Add F241h DQ15=INT
All Block Unlock Flow Diagram
Add F241h DQ=0000h
DQ=0027h
Host reads data from DataRAM Read completed
Data Protection During Power Down Operation
Load Operation
YES
Synchronous Read Mode Operation RM=1, WM=X
Asynchronous Read Mode Operation RM=0, WM=0
Read Operation
2.2 4-, 8-, 16-, 32-Word Linear Burst Read Operation
Continuous Linear Burst Read Operation
Programmable Burst Read Latency Operation
Output Disable Mode Operation
Handshaking Operation
Cache Read Operation RM=X, WM=X
Cache-Read flow chart is on the following
Map out
Write ‘Cache Read’ Command Add F220h DQ=000Eh
Write ’DFS*, FBA’ of Flash Add F100h DQ=DFS, FBA
END
Setting Read Read data from DataRAM Cont
1st DQ0 Address A/DQ15 Setting INT 2nd
4th Status Command Host reads 1st
Cache Read Diagram
Synchronous Burst Block Read OperationRM=1, WM=X
See Timing Diagram 6.3
Terminating Synchronous Burst Block Read
Synchronous Burst Block Read Boundary
102
Four Clock Burst Read Latency default condition
103
Synchronous Burst Block Read Operation Flow Chart
Synchronous WriteRM=1, WM=1
See Timing Diagram 6.8, 6.9
Addressing for program operation
Program Operation
Add F100h DQ=DFS*’, FBA
Program Operation Flow Diagram
Program Lock Error Program Error
ADD DP DQ=Data-in
107
11.1 2X Program Operation
108
2X Program Operation Flow Diagram
Add F100h DQ=DFS*, FBA
Add F220h DQ=007Dh
109
11.2 2X Cache Program Operation
110
DBS, DFS is for DDP
111
11.3 2X Interleave Cache Program Operation
112
2X Interleave Cache Program Operation Flow Diagram Start
Last 2 Plane PGM For a chip?
For a chip
113
Copy-Back Program Operation
Flash Memory
115
Copy-Back Program Operation with Random Data Input
Block Erase Operation
Erase Operation
Locked Blocks
Multi-Block Erase Operation
Add F240h DQ10=0
Multi Block Erase/ Multi Block Erase Verify Read Flow Chart
Multi-Block Erase Verify Read Operation
Add F220h DQ=0095h
Erase Suspend During a Block Erase Operation
Erase Suspend / Erase Resume Operation
119
OTP Operation
1st Block OTP Area Structure
OTP Block Area Structure
122
OTP Block Load Operation
Programming the OTP Area
OTP Block Program Operation
Write ‘DFS, FBA’ of Flash Add F100h DQ=DFS, FBA3
OTP Block Program Operation Flow Chart
OTPL=0? YES
Locking the OTP
OTP Block Lock Operation
OTP Lock Operation Steps
126
Add F241h DQ15=INT Do Cold reset
Automatically Updated
Write ’DFS, FBA’ of Flash Add F100h DQ=DFS, FBA3
Locking the 1st Block OTP
14.4 1st Block OTP Lock Operation
1st Block OTP Lock Operation Steps
128
Locking the OTP and 1st Block OTP
OTP and 1st Block OTP Lock Operation
OTP and 1st Block OTP simultaneous Lock Operation Steps
130
Data Load
Dual Operations
Read-While-Load Operation
Write-While-Program Operation
AVD INT
ADQ
DB0
DB1
133
Progress Data Loading Don’t Care
16 DQ6 Toggle Bit
Status DQ15~DQ7
DQ6 DQ5~DQ0
ECC Bypass Operation
ECC Operation
Invalid Block Identification Table Operation
Invalid Block Operation
Invalid Block Table Creation Flow Chart Start
Invalid Block Replacement Operation
1st 1th Nth
Block Replacement Operation Sequence
Block B
Operating Conditions
Absolute Maximum Ratings
KFM2G16Q2A
Test Conditions
DC Characteristics
DDP
Valid Block Characteristics
AC Test Conditions
Device Capacitance
66MHz 83MHz Unit
AC Characteristics for Synchronous Burst Read
Max Min
KFN4G16Q2A
AC Characteristics for Asynchronous Read
See Timing Diagrams 6.5, 6.6, 6.22
See Timing Diagrams 6.18, 6.19 Parameter Symbol Min Max
66MHz 83MHz Unit Min
AC Characteristics for Asynchronous Write
AC Characteristics for Burst Write Operation
Min Max
AC Characteristics for INT Auto Mode
AC Characteristics for Load/Program/Erase Performance
AC Characteristics for Synchronous Burst Block Read
RDY
8-Word Linear Burst Read Mode with Wrap Around
Continuous Linear Burst Read Mode with Wrap Around
CLK
147
148
Synchronous Burst Block Read Timing
Burst block read
149
Asynchronous Read VA Transition After AVD Low
See AC Characteristics Table DQ0 DQ15
Asynchronous Read VA Transition Before
Low
151
Asynchronous Write
Valid WD
Hi-Z
152
8-Word Linear Burst Write Mode
Burst Write Operation followed by Burst Read
≈D7
153
Start Initial Burst Write Operation
Bit
See AC Characteristics Tables 5.5, 5.7
Load Command Sequence last two cycles Read Data
Load Operation Timing
155
Program Operation Timing
Ongoing Status
13 2X Program Operation Timing
ADQ0~ADQ15 . . A1
Operation Timing
14 2X Cache Program
MuxOneNAND2GKFM2G16Q2A MuxOneNAND4GKFN4G16Q2A
ADQ15
15 2X Interleave
Cache Program
ADQ0~
Block Erase Operation Timing
Erase Command Sequence Read Status Data
159
Default
Cold Reset Timing
Bootcode copy done
Bootcode copy
INT bit
Warm Reset Timing
See AC Characteristics Tables
CE, OE
Idle
Hot Reset Timing
ADQi
BPNote 00F0h Or F220h Or 00F3h
Data Protection Timing During Power Down
Nand Flash Core Reset Timing
163
RDY
Status RD Hi-Z
164
Write command into Command Register INT will automatically
INT auto mode
165
INT Type Mono INT Type DDP
Methods of Determining Interrupt Status
166
Asynchronous Mode Using the INT Pin
Synchronous Mode Using the INT Pin
INT Pin to a Host General Purpose I/O
Polling the Interrupt Register Status Bit
Handshaking Mode Non-Handshaking Mode
168
Determining Rp Value DDP, QDP only
INT pol = ‘High’ Default
Rpohm
Vss KFN4G16Q2A @ Vcc = 1.8V, Ta = 25C , CL = 30pF
INT pol = ‘Low’
Vcc or Vccq
~50k ohm Ready
Boot Loaders in MuxOneNAND Description
Boot Sequence
Boot Loaders in MuxOneNAND
Boot Sequence
BL1 BL2
NBL3 NBL1 NBL2
BL2
BL1
4G product KFN4G16Q2A
2G product KFM2G16Q2A
173