Samsung KFN4G16Q2A, KFM2G16Q2A warranty Erase Suspend / Erase Resume Operation, 119

MuxOneNAND2G(KFM2G16Q2A-DEBx)		FLASH MEMORY
	MuxOneNAND4G(KFN4G16Q2A-DEBx)
3.13.4 Erase Suspend / Erase Resume Operation

The Erase Suspend/Erase Resume Commands interrupt and restart a Block Erase or Multi-Block Erase operation so that user may perform another urgent operation on the block that is not being designated by Erase/Multi-Block Erase Operation.

Erase Suspend During a Block Erase Operation

When Erase Suspend command is written during a Block Erase or Multi-Block Erase operation, the device requires a maximum of 500us to suspend erase operation. Erase Suspend Command issue during Block Address latch sequence is prohibited.

After the erase operation has been suspended, the device is ready for the next operation including a load, program, copy-back program, Lock, Unlock, Lock-tight, Hot Reset, NAND Flash Core Reset, Command Based Reset, Multi-Block Erase Read Verify, or OTP Access.

The subsequent operation can be to any block that was NOT being erased.

A special case arises pertaining Erase Suspend to the OTP. A Reset command is used to exit from the OTP Access mode. If the Reset-trig- gered exit from the OTP Access Mode happens during an Erase Suspend Operation, the erase routine could fail. Therefore to exit from the OTP Access Mode without suspending the erase operation stop, a 'NAND Flash Core Reset' command should be issued.

For the duration of the Erase Suspend period the following commands are not accepted:

•Block Erase/Multi-Block Erase/Erase Suspend

Erase Suspend and Erase Resume Operation Flow Chart

Start

Select DataRAM for DDP Add: F101h DQ=DBS**

Write 0 to interrupt register3)

Add: F241h DQ=0000h

Write ‘Erase Suspend

Command’ 1)

Add: F220h DQ=00B0h

Wait for INT register

low to high transition for 500us

Add: F241h DQ=[15]=INT

Another Operation *

Select DataRAM for DDP

Add: F101h DQ=DBS**

Write DFS of Flash

Add: F100h DQ=DFS**

Write 0 to interrupt register3)

Add: F241h DQ=0000h

Write ‘Erase Resume

Command’

Add: F220h DQ=0030h

Wait for INT register low to high transition

Add: F241h DQ=[15]=INT

Check Controller Status Register

in case of Block Erase

Do Multi Block Erase Verify Read in case of Multi Block Erase

*Another Operation ; Load, Program Copy-back Program, OTP Access2), Hot Reset, Flash Reset, CMD Reset, Multi Block Erase Verify, Lock, Lock-tight, Unlock

**DBS, DFS is for DDP (DBS must be same)

NOTE :

1)Erase Suspend command input is prohibited during Multi Block Erase address latch period.

2)If OTP access mode exit happens with Reset operation during Erase Suspend mode, reset operation could hurt the erase operation. So if a user wants to exit from OTP access mode without the erase operation stop, Reset NAND Flash Core command should be used.

3)‘Write 0 to interrupt register’ step may be ignored when using INT auto mode. Refer to chapter 2.8.18.1.

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