Samsung KFN4G16Q2A Dual Operations, Read-While-Load Operation, Write-While-Program Operation

MuxOneNAND2G(KFM2G16Q2A-DEBx)	FLASH MEMORY
MuxOneNAND4G(KFN4G16Q2A-DEBx)

3.15 Dual Operations

The device has independent dual data buffers on-chip (except during the Boot Load period) that enables higher performance read and pro- gram operation.

3.15.1 Read-While-Load Operation

This operation accelerates the read performance of the device by enabling data to be read out by the host from one DataRAM buffer while the other DataRAM buffer is being loaded with data from the NAND Flash Array memory.

1) Data Load		2) Data Read
Page A	Data
	Buffer0
3) Data Load
Page B	Data
	Buffer1	3) Data Read
2) Data Load

The dual data buffer architecture provides the capability of executing a data-read operation from one of DataRAM buffers during a simulta- neous data-load operation from Flash to the other buffer. Simultaneous load and read operation to same data buffer is prohibited. See sec- tions 3.6 and 3.7 for more information on Load and Read Operations.

If host sets FBA, FSA, or FPA while loading into designated page, it will fail the internal load operation. Address registers should not be updated until internal operation is completed.

3.15.2 Write-While-Program Operation

This operation accelerates the programming performance of the device by enabling data to be written by the host into one DataRAM buffer while the NAND Flash Array memory is being programmed with data from the other DataRAM buffer.

2) Program		1) Data Write
	Data
Page A	Buffer0	3) Data Write
Page B	Data
	Buffer1	2) Data Write
3) Program

The dual data buffer architecture provides the capability of executing a data-write operation to one of DataRAM buffers during simultaneous data-program operation to Flash from the other buffer. Simultaneous program and write operation to same data buffer is prohibited. See sec- tions 3.8 for more information on Program Operation.

If host sets FBA, FSA, or FPA while programming into designated page, it will fail the internal program operation. Address registers should not be updated until internal operation is completed.

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