Samsung KFM2G16Q2A Multi-Block Erase Verify Read Operation, Add F220h DQ=0095h, Add F240h DQ10=0

MuxOneNAND2G(KFM2G16Q2A-DEBx)	FLASH MEMORY
MuxOneNAND4G(KFN4G16Q2A-DEBx)

3.13.3Multi-Block Erase Verify Read Operation

After a Multi-Block Erase Operation, verify Erase Operation result of each block with Multi-Block Erase Verify Command combined with address of each block.

If a failed address is identified, it must be managed by firmware.

Multi Block Erase/ Multi Block Erase Verify Read Flow Chart

Start

Select DataRAM for DDP

Add: F101h DQ=DBS*

Write ‘DFS1), FBA’ of Flash

Add: F100h DQ=DFS, FBA

Write 0 to interrupt register

Add: F241h DQ=0000h

Write ‘Multi Block Erase’

Command

Add: F220h DQ=0095h

Wait for INT register

low to high transition

Add: F241h DQ[15]=INT

Read Interrupt register

Add: F241h DQ[5]=EI

DQ[5]=1?

YES

Read Controller

Status Register

Add: F240h DQ[10]=0

NO

Final Multi Block

Erase?

YES

NO	Read Controller	NO
	Status Register ‘Lock’ bit high

Add: F240h DQ[14]=Lock

Multi block Erase Lock/

Erase Lock Error

Write ‘DFS, FBA’ of Flash

Add: F100h DQ=DFS, FBA

Write 0 to interrupt register2)

Add: F241h DQ=0000h

Write ‘Block Erase
Command’
Add: F220h DQ=0094h
	Read Controller
Wait for INT register	Status Register
low to high transition	Add: F240h DQ[10]=Error
Add: F241h DQ[15]=INT
Read Interrupt register	DQ[10]=0?
Add: F241h DQ[5]=EI	NO
	YES
DQ[5]=1?	Erase completed
YES
Read Controller	Erase Error
Status Register
Add: F240h DQ[10]=0
NO	Final Multi Block
	Erase Address?
Write ‘DFS, FBA’ of Flash	YES
Add: F100h DQ=DFS, FBA
	Multi Block Erase completed
Write 0 to interrupt register
Add: F241h DQ=0000h
	Multi Block Erase Verify Read
Write ‘Multi Block Erase	*DBS, DFS is for DDP
Verify Read Command’	(DFS must be same)
Add: F220h DQ=0071h
Wait for INT register
low to high transition
Add: F241h DQ=[15]=INT

NOTE :

1)DFS should be a fixed value, for Multi Block Erase is performed within a single chip.

2)‘Write 0 to interrupt register’ step may be ignored when using INT auto mode. Refer to chapter 2.8.18.

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