3. Status Enable Register
The Status Enable Register is set by the user to Enable SRQs for changes in power supply status.
Table
BIT | Status name | Status | Bit Set condition | Bit reset condition | |
symbol | |||||
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0 (LSB) | Constant Voltage | CV | User command: | User command: “SENA | |
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| nn” is received, where nn | ||
1 | Constant Current | CC | “SENA nn” is | ||
is hexadecimal bits. | |||||
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| received, where | If “nn”=00, no SRQ is sent | |
2 | No Fault | NFLT | |||
nn is hexadeci- | |||||
when there is a change in | |||||
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| mal bits. | ||
3 |
| FLT | |||
Fault active | Status Condition Register. | ||||
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4 | AST | Always zero | Always zero | ||
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5 | Fold enabled | FDE | Always zero | Always zero | |
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6 | Spare | Spare | Always zero | Always zero | |
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7 (MSB) | Local Mode | LCL | “SENA nn” | “SENA nn” | |
command | command | ||||
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4. Status Event Register
The Status Event Register will set a bit if a change in the power supply status occurs and it is en- abled. The register is cleared when the “SEVE?” or “CLS” commands are received. A change in this register will generate SRQ.
Table
BIT | Status name | Status sym- | Bit Set condition | Bit reset condition | |
bol | |||||
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0 (LSB) | Constant Voltage | CV | Changes in status |
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occur and it is |
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| Enabled. |
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1 | Constant Current | CC | The change can |
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| set a bit, but |
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2 | No Fault | NFLT |
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when the change | Entire Event Register is | ||||
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| clears the bit re- | ||
3 | Fault active | FLT | cleared when user sends | ||
mains set. | |||||
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| “SEVE?” command to | ||
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4 | 0 | Always zero | read the register. | ||
abled | |||||
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| “CLS” and | ||
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5 |
| 0 | Always zero | ||
Fold enabled | clear the Status Event | ||||
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| Register. | |
6 | Spare | 0 | Always zero | ||
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| Unit is set to Lo- |
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7 (MSB) | Local Mode | LCL | cal by pressing |
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front panel |
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| REM/LOC button. |
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