o o o o o o o o o o a o o o o

O

o o o o o o o o o o o o

O

o o o o a a o o o o o o o a o

U10418. Also, when th€ ON/OFFtine goes high, it €nablesthe NCR gate, UlOgTC,to steer-thepoiition counterontothe characterRAMaddressinputsthrough fine driverU3042and muttiptexersUI050 and U1046. When cleared,this bit places an address, latched in U3038 and U3034, on the character RAM address inputs.

Bit 1 interpretsdata sent to the address/dataport as an address(1) or data (0) for the characterRAM. Settingthis bit disabtesthe characterRAMfor inputand sets up the clock signalto latchthe address.

Whenthis bit is set, eg of U0034gates a high on the output ot U2044A.--Thishigh preue-ntsinputto the characterRAMs, U20SZand U2052,by settingits R/W input high. This high atso disconnecti the instrument bus from the characterRAM data inputs by disabling U3047;meanwhile,U2O}ZAis enabledto gatethe ctock signalthat latchesthe address. Thepositiveclocktran- sitionis apptiedto U3039whenDATAVALIDgoesfatse at the end of a writ€ cycle to the addressldataport, releasing2F.

Whenthis bit is clearedand 2F is asserted,U2O44A enablesthe characterRAM for input and passesthe datathroughU3047.

Table 7-9

CONTROLPORT

Function

0Readout on/off

1Address/data

2A9 of RAM address

3Max Span dot

4A8 of RAM address

516 line mode

o40 characters/line

7Spectrum display available

Bit 2 is the MSB of the RAMaddress.

Bit 3 controlsthe frequencydot marker. This bit is set in the MAX SpAN^m9deto positionthe frequency dot with MAX DoT CONTROLfrom the Sweepboarci Whencleared,this bit centersthe frequencydot on the spectrumdisplay.

Bit 4 is the Ag addresslinefor the characterRAMs.

Bit 5 is the selectfor 16 linesmode.

Bit 6 selectsthe 40 character/linemode.

Bit 7 enablesthe ctippeddisplaywith the spectrum. When high, U1055 is enabledand causes.t40 ps periodsto occur betweencharacterswhen the spec_ trum is disabled. When low, U.l05S is disabled.R/O

Theory of Operation- 4g4[l4g4Ap Service,Vol. 1

OFF is forcedlow to disablethe sp€ctrumdisplay,and W1028Eforces the current boost additionto be dis- abled. Also, U1016is disabledso that the markerdot is not displayed.

Address/Data port The microcomputerloadschar- acters for crt displaythrough the address/dataport. Eachcharacterrequiresthe followingfour writecycies.

1.Bit 2 in the control port is set for an address transfer,and th€ upper 2 bits of the RAM address (A8,A9)are sent.

2.The lower I bits of the addressin the character RAMare sentto the address/dataport.

3.Bit 2 in the controlport is cleared.

4.The data is sent to the address/dataport. The

bits are definedin Table 7-10; Bits 0-5 are the lower six bits of the characterRAM addressor are the ASCIIcodefor the character.

Table 7-10

ADDRESS/DATAPORT

Function

Address of ASCII code

Skip bit

Blank character

Bit 6 causesthe line counter,U2014,to skipa line, if set.

Bit 7 is used to reduceoverheadreadoutdisplay.lt is set when a space is transferredto the character RAM, so the readoutdoes not steal time frornthe spec- trum trace to scana blank. Whenset, this bit prevents the GEN RUNNTNGflitrflop from gating R/o oFF tow throughU2O44B.

Frequency Dot Marker

The frequencydot marker is refreshedimmediately after the last characterpositionin the lowerreadoutis scanned. Normally,the marker is centeredon the screenjust belowthe upperreadoutas a pointerfor the center frequency readout. When MAX SPAN is selected,however,the dot marker movesto a pointon the display that correspondsto the center fr€quency value.

The negativetransitionof line D triggersthe marker generator. A simplifieddiagram of the circuit and its timingis shownin Figure7-22.

7-57

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Tektronix 494AP service manual Address of Ascii code Skip bit Blank character