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The digitalcontrol circuits receiveand decodethe address and instructions from the microcomputer, select the . sweep rate, holdoff time, trigger sourcer sweepmode,controlmarkerdac,and cont?itinterrupts to the microcomputer.

.^.I"_I:rIT. DAC providesa dc levetcorresponding ro tne markersweepposition.

The Sweep board analog section consists of the ?Ip 9r sweep generatorptus tts output buff€rs that drive the deflection amplifiers,the osclllators,digital storag€,Z axis,andthe triggercircuits.The sweepand triggercircuitsare digitallycontrolled.

Digital Control

-Threeinstrumentbus addressesare associatedwith th€ sweep board. Addresses 0F and 1F are write addressesand 9F is a read address. Two bits at addr€ss lF subdivide address 0F into four subad- dresses.

Bus decoderU40gOoutputslows for addresses0F, 1F,and 9F. U4020bufiersthe instrumentbus databits. U1027 is used as a 6-bit register to hotd data at address lF. Data bits 6 and 7 go to U1030 which decod€swhichof Ui03S, U2O3O,UiO+S,and Ul040 ar€ activatedat addr€ss 0F by U4Og0. ThesE registers

storethe microcomputerslatest commands for the trigger single sweep and the abort lexc-pt

sweep com_ mands,whichare not stored)and they controlmost of the op€rationof the sweepboard.

Commandsthat can be written arE:

osweep start for singte sweep mode (bit 3 of lF high).

oIntemalfrequencyreferenceon or off (bit 4 of lF towfor on and highfor ofr).

o Singlesweepoperation(bit 0 of 0F.0high).

oSweeprateselection(bits0-4of 0F.1.see Table7-11).

Theory ol Operation- 4g4[l4g4Ap Servtce,Vol. .t

TABLE 7.11

SWEEP RATE SELECTIONCODES

Sweep Rate	D4 D3 D2 D1 DO
20ssldiv	1	1	0	1	1
50	1	0	1	1	1
100	1	0	0	1	1
200	0	1	0	1	1
500	0	0	1	1	1
1 ms/div	0	0	0	1	1
2	1	1	0	0	1
5	1	0	1	0	1
1 0	1	0	0	0	1
2A	0	1	0	0	I
50	0	0	1	0	1
100	0	0	0	0	1
200	1	1	0	0	0
500	1	0	1	0	0
1 s/div	1	0	0	0	0
2	0	1	0	0	0
5	0	0	1	0	0
1 0	0	0	0	0	0
Manual	1	1	1	1	1
External	0	1	1	1	'l

Commands written to address 1F control the triggersand sweep holdofftime. Thesecommandsare as follows:

. Abort sweep(bit0 of tF goes high).

o lgnoreinputtriggersignals(bit 1 of 1F high).

o9islble sweepgateand btanknon-storedisptay(bit 2 of 1F high).

oTriggerrnode(controiledby bits g & 4 of 0F.0,see Table212).

. Sweepholdofftim€ (bits5 & 6 of 0F.0,see Table7-13).

. Interruptat end of sweep(DataBus bit 4 goeslow when the microprocessordoes a pOLL after it detectsthe interrupt,bit 1 of 0F.0 enablesthe end of sweepinterrupt).

7-61