Tektronix 494AP DIGITALCONTROLDiagram9, Theory of Operation- 494l4g4Ap Service,Vot

Theory of Operation- 494[l4g4Ap Service,Vot. 1

DIGITALCONTROL(Diagram9)

The Digital Control section providesoperatorand digital controller interfaces. lt translateschangesin front-panelcontrolsand,for the programmable

version, also translatesinstructionsreceivedvia the GplB into codesthat controlthe instrument.

The user interfaceto th€ digital control operating program is discussedin the Operatorsand program- mers manuals. This descriptionfocuseson the rnajor circuitsthat make up th€ DigitalControlsection. Those circuitsare:

. Microcomputer

oAddressableregisterson the instrumentbus

. Frontpanel

o AccessoriesInterface o GPIBInterface

Microcomputer

ThEMicrocomputersystemreceivesinputsfrom the front-panelcontrols, the instrumentcircuits, and the GPIB (programmableversiononty),and sends control codes to the instrumenthardwareto set it for desired operation. The Microcomputerconsistsof a micropro_ cessor,memory,variousinput/output(l/O) circuits,and associatedbus structures. The circuitsare locatedon the Processor(A58), Memory (A54),and GptB (A56) assemblies.

The microcomputeris centeredarounda micropro- cessor. Input/output(l/O) is providedby a Timer, a PeripheralInterfaceAdapter(plA),and for the program- mableversiona DirectMemoryAccess(DMA)ioniroller and a GeneralPurposelnterfaceAdapter(GFIA). Sys_ tem memory includes both read-only-memory(ROM) and random-dcc€sS:rn€mory(RAM). The ROMcontains the instrumentoperatingsyst€m and other firmware. Front-pan€lcontrol s€ttings, displays,and calibration informationare stored in non-volatileRAM. This RAM has battery backup power to retain the data when instrumentpower is off. The instrumentoperatingsys_ tem usesadditionatRAM.

The microprocessorcommunicateswiththe memory and l/O ports via the microcomputerbus. Communica- tion withthe rest of the instrumentis viathe instrument bus.

Interruptsfrom variouscircuitscan requestproces- sor service. The firmwarecontainsa serviceroutinefor each of the interrupts. lf necessary,the processorcan

mask,or ignore,all interruptsexceptfor a powerfailure interrupt.

The accompanyingillustrationsshow the address allocationsfor the microcomputer.Thesewill be useful for the followingdescriptions. Figure7€0 shows the entire address range of the processor. Figure 7-31 shows th€ l/O address range. Figure7€2 shows plA and Timer memory maps. Unlessothewyisenoted,all addressesare in hexadecimal.

Processor (Diagram 41)

The Processorboard (A58)containsthe micropro- cessorand most of its peripheraldevicesthat compose thEcomputersystem.

Microprocessor. The microprocessor, Ul025, processesdatai generatesaddressesand control sig- nals,and controlsthe operationof the instrument.The microprocessor,a 6808 (alsoknownas 671271,has an 8-bitbi-directionaldata bus and a 16-bitaddressbus.

Output signals include the 02 Clock (Enable), ReadfA/rite (R/W), Bus Available (BA), and micropro- cessorValidMemoryAddress(VMA).

The microprocessordividesthe CRTClocksignalby four, producingan intemaltwo-phaseclock. This clock is availableat the microprocessor'sEnableoutputas a signalfabeledd2 Clock. The 853.3kHz02 Clockdrives the Timer,PlA, and DMA Controller,and it is one of the controllinesavailableon the microcomputerbus.

The Read/Writeline indicatesto the peripheraland memorycircuits wheth€r the microproc€ssoris in the r€ad state (high)or the write state (low). The read state is the normal standby conditionand a responseto a halt signal. U10308 and U2030Fbufferthe R/W signal to drivethe variouscircuits.

The Bus Availablesignalgoeshighto indicatewhen the microprocessorreleasesth€ data bus. This occurs whenthe microprocessorexecutesa WAITor whenthe HALTlnputgoeslow.

Ahigh VMA signal tells the memory circuits that the,reis a valid addresson the microcomputeraddress bus. U3036Cissuesthe VMA signalto the memorycir- cuits from either the microprocessoror the DMA Con- troller.

7-88