Tektronix 494AP service manual O o

Theoryof Operation- 4g4A/4g4ApService,Vol. 1

Graphicalpresentationof mathematicfunctionsor experimentaldata is common.one such graph has a singleY valuefor each X value.An alternaiepresenta_ tion of the data in this graph would be a table simply listingthe x coordinatevaluesalongwith a correspond- ing Y value for each X value. To further simpliiythe graph, if the first X value and the spacing beiween X values were known (all spaces assumed equal),the two-columntable could be reducedto a singlecolumn with the X valueimpliedby the positionof the y valuein the column.This is the essenceof cligitalstorage_ to converta vertical analogvoltagg(y coordinatevalue)to

abiiary number and insert that number in a stored table.Th€ locationof the y valuein the table is deter- minedby the analogsweepvoltage(X coordlnatevalue) binary conversion.Once a s6t of binary numbersthai rspresentvaluesacross a waveformis stored to cr€ate

atable, the waveform can be recreatedat any time by conversionof the tablevatues(y) and positions(X)baci< to analogvoltagesthat representamplitudeand sweep positions.

The digital storage system uses a Tabte A and a Table B. Table B is updatedevery sweep.TabteA is also changed unless the Save A mode is selected. Thereare 500 A valuesand 500 B values.The spacing betweenvaluesis the samethroughoutbothtables,but the startingpoint for TabteB is shiftedstighflyso that whenbothtablesare read,thE readoutvaluesare inter- laced.

When the signals are recreated,the contents of either Table A or Table B can be displayed,or both tablesA and B can be displayed.tf both TablesA and B are to be displayed,and thg SaveA mode is selected. the contents of both Table A and Table B are drawn, each displayin its own trace. lf the Save A mode is not selected,the contents of both Table A and Table B are displayedon one trace, with 1000 value positions acrossthe screen.A third traceoptionis also available.

In the B-Save A mode,the displayedvaluesare those that r€sult from an arithm€ticop€ration and are the differencebetweenthe contentsof TableA andTableB for eachX valueof anatogsweepvoltage.

Sincea signal waveformis continuousand a table has discr€t€ X values,an algorithmdeterminesthe y valueto be stored for a particularX valus.This allows the operatorto selectone of two methodsto determine

Yvalues;peakor average.The y analogvoltageis con- tinuouslysampled,with the samplingrate dep€ndent uponsweepspeed.For eachX value,there are always at leasttwo samples,and there may be as manyas 217 samples. From this set of samples,either the largest samplevalue(peakvalue)or the mean of all the sam_ ples(averagevalue)can be s€l€cted.Selectionbetween pgak ancl averag€ ls controlled by the front-panel PEAK/AVERAGEcontrol,which sets a dc level that is eomparedwith the analogverticalinput to producethe PEAK/AVGlogic signat. Whenthe input signatis below

7-40

the level selectedby the front-panelcontrol,the signal is averaged;whenthe inputis abovethat level,the peak signal is displayed.The dc levelappearson the display as a positionablehorizontalline. This line is created when the dc level is switchedto the analogoutputline during the cursor cycle by the CURSORlogic control signal.

Superimposedon the cursor line is an intensified spot called the update marker,which indicatesthe X value at which new Y values are being computedfor display update.The updatemark€r is formedwhenthe analogsw€epinputis comparedto the displayanalogX output.Whenthe two are the samevalue,the sweepis forced to pause,whichincreasesthe markerintensityat that point.

Two customintegratedcircuitsare th€ heartof the digital storagecircuits.Th€ v€rticalcontrollC contains the vertical acquisitionand display logic, peak detec- tion, signal averaging,Z-Axis blanking,and specialY- value processingcircuits.The horizontalcontrollC con- tains the horizontalacquisitionaddress counter,hor, izontaldisplaycounter,10-bitRAMaddressmultiplexer, and a system control matrix. Th6 other digital storage control circuits consist of two 8-bit digital-to-analog converters,two 1O-bitdigital-to'analogconv€rters,one 10-bit latch, 8K bits of random access memory,and various auxiliary circuits. Timing is controlledby OZ ctock pulses (at 1 MHz) from the Processorboardto the HorizontalDigitalStorageboard.

Vertical Section (Diagram 25)

The VerticalControllG block diagramis shownin Figure7-15. The verticalanalogvoltageis convertedto

aY binaryvalue by an 8-bit successiveapproximation register. Nine clock cycles are required for each Y conversion.After the conversionhas taken place,the successive approximation register produces the negative-goingSYNC signal. Most functionson both th€ verticaland horizontalcontrollCs arEsynchronized by this signal. On the negative-goingtransition of SYNC,the successiveapproximationregisteris resetto 10 00 00 00 (binary)and the next conversioncycle begins.Incomingdata bits ar€ latchedinto the register on th€ negative-goingclock transition.From the regis- ter, the output data is applied to the peak and the averagingcircuits.

The averagingcircuitconsistsof threegroupsof cir- cuits; those that accumulateall the Y valuesfor a given

Xvalue into a grandtotal (calledthe numerator),thos€ that count the number of samplesthat make up the numerator(this total is called the denominator),and those that subtractandshiftto divide.

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