Tektronix 494AP service manual A o A o o A o o o o a o o, SPANATTENUATORDiagram32

o o a o

I

O Ia

o o a o o

I

a

I

O

o

Ia

o o

Ia

a o

O O

o

Io

o

I

O

o a a o o o o a o o

SPANATTENUATOR(Diagram32)

The span Attenuator selects the appropriate attenuationfactor for the incomingswe€p signal, to establishthe frequencyspan.The span Attenuatorcon_ s-ists of digital control circuits, which receive and decode the addressand instructionsfrom the micro- comput€n the input amplifters,which perform noise reductionand signal inversionon the inioming sweep signal;th€ digitat,to-analogconverter,whichattenuatesthe sweep signat to the desired amplitudefor driving the l st LO Driverand preselectorDrivercircuits;ani the decadeattenuator,whichprovidesthreedecadesof attenuationfor the outputsignals

Digital Control

Decoder US025decodes the address information from the addressbus and sendsa low signalto either of the two tatches, u1025 (address 75) or u2015 (gddress76),whena latchis addressedanOttreOltl VALID lin€ rnoves high. (Th€ data is stored in the latcheson the.trailingedge of the DATAvALtDsignat.) Logic buffer U4015 reducesloadingof the data bus. Latch U1025stor€s data that contr;ls th€ eight least significantdigits of the span att€nuationfactor. Latch U2015storesdatathat controlsthe two mostsignificant digitsof the spanattenuationfactor,and otherfunctions on the board. When a span attenuation factor is selected,the microcomputerselects an addressand pJlcg_sthe first byte of the data on the bus. The DATA VALIDsignalcausesthe datato b€ storedin oneof the two latches.Thenthe secondaddressis calledand the next byt6 is stored in the other latch. The block diagramillustratesthe significanceof each bit in tabtes nearthe affectedcircuit. A logic 1 representsthe more positive of two levels or high state, and a logic 0 representsthe morenegativeof two levelsor low state.

Input Section

The sweep signal and its ground referenceare appliedto differentialinputbufferU3036.Any signatsor noise inducedin the two signaltransmissionpathsare canceledby this stage.

. The following stage consists of amplifierUgO32, plus switchingtransistorse2025, O2O2S:and e2023. D.ifferentrnixingmodesrequirethe 2nd LO frequencyto either increaseor decreaseto increasethe signatire_ quency. Thus,this circuitis a unity gain amplifierthat can be changedfrom invertingto non-inverting,underbus control.Whenlineeg of latchU2O1Sis low-,A2O2gconducts and its collector moves positive to about +5 V. This in turn causes both O2C'2Sand e202g to conduct. Pin 3 of Ug0g2is effectivetygrounded,the sw€epsignal is appliedthroughR3029to the summing nodeof the amplifier,andthe gainof the stageis _1. I

Theoryof Opera0on- 4g4Al4g4ApServlce,Vol. 1

fine Q8 is high. O2O2gdo€s not conductand the voltage at its collectorfails to nearty-1SV. Neithere2025 n6r Q2028are now in conduction,so the sw€ep signalis appliedto pin 3 of U3032.and pin 2 is disconnlcted. Now,the gainof the stageis +i.

Digital-To-Analog Converter

The magnitudeof the sweepsignalis determinedby the desired frequencyspan, band,and option InstalleA in the instrument. The microcomputercalculatesthe propermagnitud€for each combination,and sendsthe appropriate codes to the data latches, which in turn control the attenuation factor of the digital_to-analog convefter. This stage consists of converter tJ1042, ampfifierU2A42,and a complementarypair, e2052 and Q3056,that form th€ output currentbuffer.

Figure7-23iilustratesa simptifiedtwo-bitdigitat-to- analogconv€rter. The circuitworks by currentdivision. SincEthe summingnode of the amplifieris at ground potential,the magnitud€of th€ currEntthrougha resis- tor is not aff€cted by the positionof the switch that selectsthat resistor. For example,whenswitch51 is at positionB, the currentis shuntedto ground. When51 is at positionA, the currentthroughRl becomespartof the total output current. Thus, the output curr€nt can be 0, 1/4, ll2, or 314 of thg total cunent available. Becauseof the resistanceratios,th€ ratioof th€ output voltage to thg input voltags equalsth€ ratio of the out- put to the total curren!(Vo,r,/Vin- lout/lour).In this 2-bitconverterithere are 22 or 4 outputvaluesposslble. In th€ actuallo-bit converter,therearc 21oor 1024output values.

fn converter U10/'2,each internal resistance is switchedin or out by a CMOSFET(internatto the dev- ice). The CMOSinputs are each protEctedby a series input r€sistor. Sincethe sweepsignalis appliedto th€ Vref input, V1042 serves as a digitally controlled attenuatorfor the sweepsignal.

The attenuatedsweepsignalfrom V1042is applied to U2042,an operationalamptifier. lt in lurn drives an outputcurrentbuffer,consistingof complementarypair 42062 and Q3056. The pair is biased to produce a standingcurrent of about 10 mA in the absEnceof an appliedsignal. This eliminatescrossoverdistortionof the outputsignal.

DiodesCR2051,CR2053,CR1051,andCR1049pro- vide temperaturestabilizationfor the bias currentin the stage. When high currentis passingthroughthe pair, diodes CR1056and CR1061clampthe voltageacross the emitterresistorsto reducevoltagedrop.

7-65