Tektronix 494AP service manual O o e, O o a a A o a a o o

Theoryof Operation- 494A/4g4ApService,Vol. .l

MarkerlC. MarkerlC U9020performsseveralfunc_ tionson the HorizontalDigitalStorageboard:

In conjunctionwith HorizontalDigitat storage tc U5020,it cr€atesthe two waveformmarkersand the updatemarker.

Controlsthe processoraddressesassignedto digi- tafstorage-7A,78,FA,andFB.

Createsthe fast-retraceblankingpulseDSBLANK.

Takes control of the address lines to the display RAM when the microprocessoraccessesthe digit;l storagedata.

To createthe waveformmarker,it monitorsthe hor_ izontaldisplaybits, HD0-9,and the CURSand B-A sig- nals. Whentheselinesindicatethe displayhas reached

apointthat matcheson of hffo pointspreviouslystored in the lC by the microprocessor,the lC sets A INTEN_ SITY high, causing U5020 to repeatedlydisptay the samepoint untilA INTENStrygoes low again(whichit does after a number of DS ENBL cycles previously storedin the lC by the microprocessor).

The update marker is initiated by a comparator detectingthat the analogsweepand the disptaysweep have crossedas explainedelsewhere. U3O2Odetecti this eventon the CSLFSline. lf the VALIDtineis high whenthis occurs,U3020sets INTENSITyhigh,causlng U5020to repeatedlydisptaythe same point untit15 DS ENBL cycleshave passed, Then INTENSTYgoes tow again.

U3020 monitors HD9 to generatethe DS BLANK pulse. WhenHD9 goes from high to low and the CUR- SORline is low, U3020sets DS BLANKhighfor one DS ENABLEcycle.

Whenthe microprocessorwantsto readvalu€sfrom or write data to the waveformmemory,it first sends a starting address to u3020. circuitry on the vertical Digitalstorageboard(A61A1)controtsthe BUs GRANT line which indicateswhen U3020can actuallyaccess

the digitalstorageRAM withoutdisturbingthe disptay. WhenBUS GRANTgoes tow, U9020(insteadof U5020) drivesHD0-9.

The VerticalDigitalStorageboardalso generatesan INCR ADRS (lncrementAddress)pulse for each BUS GRANTcycle. U3020incrementsthe addressthat it witl asserton HD0-9by one for each INCR ADRS pulse. The microprocessorloads an initial address and the addressregisteroutputsare appliedto tri-statebuffers. Then, the 10 bits of address from the counters are butfered.Those signals are multiplexedonto the HD (horizontaldisplay)linesand R/W (read/write)lineto the memories.These buffers are enabledonly during the bus grant portion of the cycle for display of memory

data. At all other times, horizontalcontrol circuit U5020 outputs controlthe HD lines to det€rminethe memory addressfor updateof memorydata.

U3020 controls and subdivides the addresses assignedto digitalstorage. The VgrticalDigitalStorage boardrespondsto addresses7A,78, and FA. TheHor- izontalDigitalStorageboardrespondsto addresses7A, 78, FA, and FB. The DV (DataValid)line(whichctocks data to or frornth€ microprocessorfrom th€ instrument data bus)goes to U3020,which sendsa controlledver- sion of this line, VDV, to the Vertical DigitalStorage board. When the addresses on the Vertical Digital Storage board are to be addressed,this line is active and none of the addresseson the HorizontalDigital Storage board are affected. When the addresseson the Horizontalboard are to be accessed.VDV ls held low by U3020regardlessof DV.

Address7A on the Horizontalboardis furthersubdi- vided into 7A.0 through74.7 by threebits of 78 on the Horizontal Digital Storage board. Access to these addressesis passedbetweenthe two boardsby U3020. Readingfrom addressFB will give accessto the Hor- izontal board regardless of which previously had

acc€ss. Sendingthe bits to 78 on the Horizontalboard to access7A.6 (DB6-4- 110)will pass accessto the Verticalboard. SendingD86,5-11 to 7A.5of the Hor- izontal board will also pass accesE to the V€rtical board. SendingDB6,5-10 to 7A.5 of the Horizontal board will pass accessto the Verticalboard,but only for one DV cycle.

Tracking Digital-to-AnalogConverter. The 10-bit digital-to-analogconverteroperatesas part of the loop that acquiresa binary equivalentof th€ swP (sweep) input signal from the Sweep board. GonverterU4040 acceptsthe output from the 10-bitup/downcounterof U5020 and convertsthat output to an analogcurrent. The analog current is then subtractedfrom the SWP signal (which is applied at edge connector pin 60 throughbufferU40298).The resultof this subtractionis suppliedto up and down comparatorsin U3050. This createsthe UP or DOWNsignal,as appropriate,to con- trol the countdirectionof the 1o-bitup/downcounterin U5020. The counter then counts in the appropriate direction,whichchangesthe digital-to-analogconverter outputto reflectthe propervalue.

UpdateMarkerCircults.Thesecircuitscreatea cur- sor to show the presentupdatelocationwhilea digital

storagedisplayrefreshes.The cursoris madeby stop- ping the sweepfor a shortperiod,allowingthe crt phos- phors to brightenat that spot. This occursat eachof

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