Tektronix 494AP service manual COUNTERBOARDDiagram38

Theory of Operaton - 4g4Ll4g4ApService, Vol. 1

CR2068.CR1065providesa clampto preventa control line voltage less than 5 V. CapacitorC1070 sets the low end of the controlvoltageto about 6 V. Rangeof the control voltage, over the 20A-Z2OMHz VCO ,ing", is about*6 V to +11 V.

The off/on status of the VCO is controiledby U4074 which is activatedby D3 from the data bus. The value is latchedin U4074and its outputturns e2076 off or on. The outputalso controlsthe sensitivityof dividerU5015. Duringthe period when the VCO is 6tr anOthere is no input signal,the dividersensitivityis loweredso stray signals wlll not activatethe divider. This is done by turning05027 on and puilinginputpin 6 of U501Stow.

The 100MHz signal from the grd Conv€rteris applied through a resistive power splitter to divider U2017and to bufferamptifierel015. The 1 MHzoutput from the divider, U2A1T.is furtherdivided by 5 within the synthesizerlC, to b€come the 200 kHz reference frequencyfor the synthesizer.The amplifiere1015 has negativefEedbackfor gain stabilization.lts outputsig- nal is appliedto the counterboard.

The 10-80MHz signal from the harmonicmixer is passed through a 7-pole low-passfilter with g0 MHz cutofi. The signal is then amptifiedby U4021 with a broadbandgain of about24 dB.

COUNTERBOARD(Diagram38)

The Counterboard circuitsand functionare: 1) The addressdecoder which receivesand decod€s th6 talk and listen commands for the microcomput€r.2) The servicerequestcircuitsthat sensean impendingloss of lst LO phase lock and sends a servicerequestto the microcomputer. lt then cancels the request when directed by the microcomputer.3) The data bufiers transmitdata to and from the microcomputer.4) The input amplifiersand multiplexeramplifyinput signalsup to TTL levelsand then selectwhichof the inpui signals is to b€ counted. 5) The +2n counter divideJ the selectedinput signalby somepowerof 2 as determined by the microcomputer6). The 21-bitcountercountsat a 100MHz rate for a given numberof cycles of the selectedinputsignal.

Address Decoder

The addresses from the microcomputer are decodedby address decoderU2040. The countercir_ cuits hav€ both a talk address,wherethe counter-buffer circuits are instructedto talk on the data bus, and a fistenaddr€ss,where UgA24is directedto receivedata from the data bus. The talk addressis Fg; the listen addressis 73.

Service Request Circuits

The servicerequest circuits consist of multiplexer U3040,latchU30488,and associatedcircuitry.Thiscir- cuitryalertsthe microcomputerin the eventthat the lst LO has drifted too far. The UP and DOWNsignalsfrom the window comparator (located on the Error Amplifier board)drive NOR gate U3010C. Both signalsare also sent to U3034,where their status can be read by the microcomputer.When one of these signalsis high, it indicatesthat the Error Amplifier is approachingits operating limits and the microcomputershould actjust the lst LO frequencyso the Error Amplifierreturnsto th€ c€nterof its range. A highat eitherinputof u3010c produces a negative transltion that ls inverted by U3046C. C2050pulls th€ set input of U3048Bhighfor approximately10 ps. The Q output of U30488 then goes high, causing 04052 to pull the SR (seMce request)linelow.

The Q-not output of u30488 puils the G. and G2 inputs of multiplexerU3040 low, enablingboth sides. This device allows Q4034and U3O48Bto respondto inquiries by the microcomputerto determinewhich address requested service. The microcomputerini- tiates the polling routine,which pulls the POLL signal and AB7 high, then interrogateseach data bus linEin successionto determinewhich addressrequ€stedser- vice;i.e.,which dataline is low. To do this, the Yl out- put of U3040(pin7) is set high,whichcausesQ.4034to pull the DBz line low. To affirm which address requestedservice,the microcomputernow causesth€ AB7 addressline to move low, which, via thE Y2 line from U3040(pin 9), clocks U30488to the reset state as the microcomputerholdsdata bus line2low, Thiscan- cels the servicerequestbecauseit cuts off Q4052per- mits its output to move high. In addition,the comple- mentoutputof u30488 moveshigh,whichdisablesthe inputsto U3040. This bringsthe servicerequestcircui- try backto its originalstate.

Data Buffers

The data buffersconsist of u3024, u3034, u3030, and U2026. U3024is the listen buffer. Whenaddress decoderU2040is addressedby the microcomputerto listen,it enablesU3024,which passeson the buffered data to the other circuits in the Counterboard. The functionof eachdatabit is as follows:

DB0-This line carries the serial data that selects which input signal is to be counted and what n numbersto use in the r-2n counter. This data is foadedinto shift register U1022. DBOalso carries the data for the +N counterin the PhaseLock Syn- thesizercircuits.

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