Tektronix 494AP service manual O a o, O o o o O o o a o A o o

Theoryof Operaton - 4g4[l4g4Ap Servtce,Vot. 1

appropriateaction. Th€ followingis a descriptionof the hardwareand a brief descriptionof the softwareused bythe front panelCPU.

Potentiometers. The following controls or adjust- mentsgenerateanalogsignalsused by other functions of the instrument. These controls are non- programmable.

INTENSITYis an input to th€ Z-Axis/RF Interface boardto control trace brightness.

PEAK/AVERAGEis a digitat storage input that causes signals to be either peak detected above or averagedbelow a displayedcursor lanethat tracksthis control.

MANUALSCAN sweepsthe spectrumor displayin manualsweepmode.

POSITION centers the horizontal and vertical deflectionon the crt.

LOG/AMPLCAL varies the video signal level prior to the Video Processorboard and adjusts 10 MHz lF gainto calibratethe log display.

OuFut Mode Shift Registersand LED'.As previ- ouslydescribed,LEDsmountedbehinda pushbuttonor belowfront-panellabelsindicatethe mod€ of operation. Someversionsof the spectrumanalyzermay not useall indicators;for example,the non-programmableversions do not havea RESETTO LOCALbutton,

The LEDs are driven by shift registers (U5O4S, U6081, U6028, U6045. and U1049) that reside at address74 (hex)on the instrumentbus. The shiftregis- t€rs that drive the LEDs are reloadedeachtime a LED changes state. The master microprocessorchanges the appropriatebit in the LED code then reloads all registers. The shift register U60gl that drives the GRAT ILLUM LED also controlsthe voltage regulator U6090,which providespower for the graiicule-lights, DSl0t1andDSl013 .

Proeessor.	g-bit
	The CPUis an 874i self-contained

microprocessorwith on-chipEPROMand RAM. Refer to IntelUPI Users manualfor a completedescriptionof the this microprocessor(lntel8741).

The lC has a self-containedclock and a timer. The clock uses a 6 MHz crystal,y3030, as the resonator. The timer functionseitheras a programmabletimer or counter.

7-98

The CPUhas two input/outputports. Port plGplT is input only and P20-P27in an input/outputport. Each port is 8-bits wide. In addition, the CPU has an 8-bit data port (D0-D7)called the output buffer,which tatksto the master microprocessor.In this applicationall data is output only with U4030being a buffer betweenlhe GPU and the instrurnentbus. Infoffnationthat the cPU wishesto relayto the mastermicroprocessor,is loaded into a latch connectedto the output bufferU4030. The master microprocessoraccesses the CPU by pulling address F4, out of decoder U6024,low to activatethe output bufierand enableU4030so data is passedonto the instrumentbus.

The CPU is reset by the master microprocessor. When DB3 is selectedfor more than 10 ms (sameas writing 08 at address74) C1016 chargesand U1024A outputresetsthe CPU.

Scanningthe Keyboard. The front-panelkeyboard is arrangedin a matrix of 4 rows of I columnsand 6 rows of 7 columns(seeTable7-24). The RESOLUTION BANDWTDTH, SPAN/DV, TME/DV, MIN RF ATTENdB, and REFERENCELEVEL selectors are rotary switcheswhere eachcontactoccupiesa position

in the keyboardswitch matrix. The TIME/DVand MIN RF ATTEN a(e position dependent. The master microprocessornotesthe currents€ttingof theseselec- tors by noting which contacts are closed. When a changeis madethe mastermicroprocessornoteswhich

directionthe selectorwas movedby notingthe relative positionof the currentcontactclosurewith the previous setting. Pull up resistors,within R2041plus R2044,on each column of the row currentlybeing read, will pull that columnhigh if the switch is open. The basicalgo- rithm of scanningis to pull one row at a timedown and note which columnshave a 1 or 0. Port one. Pl 0-P17 (pins 27€4), read the columns. Part of port two (pins 21-241are responsiblefor activatingthe rows. Basically the processconsist of pullingone row at a time down to E logic 0 and then reading all the columns. lt a switchcontactis open it readsa "1" and if it is closedit readsa "0'.

Since there are 10 rows to scan and only 4 pins (P2O-P231availableat the number2 port, the outputis multiplexedthroughU4021and U5021. TheselC'sare open collector output, TTL compatible multiplexers. They decodedata out of P2O,P21,P22, and P23 (pins 21-241and their output pulls the appropriaterow of keys down.

Due to the characteristicsof the switch matrix. if two keys,in any row or columnare closed,and a third is closed so three corners of a rectangleare esta- blishedin the key matrix,the CPUwill see a phantom closure at the fourth corner. For example;if Y6/X3, Y6/X7 are closed,and then Y3lX7 is closed,the CPU

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