Tektronix 494AP service manual A o a o o o o, O a a o a o

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Marker DAC

The Marker DAC circuit provides a dc level correspondingto the marker sweep position. This occurs during retrace. allowing osciliatorsto operate long enoughfor the counterto get an accuratereading gJ the marker position. The processorloads twelve bits to Marker DAC UlO47. Thls dc levelreptacesthe swe€prampduringth€ duringthe retracetimewhenthe swe€pis inactive.The Markercircuitson the Horizontal Digital Storage board reads the dc voltageand recon- verts to digital to feed the processor. ihe processor comparesthese bits to the locationof the marker in digitarstorageand adjuststhe MarkerDACbits untirthe digitizedvoltagematchesthe markerposition.

U1047 is a 12-bitDAC. The 12 bits come frorn registersUl040 and Ul045, the address0F secondand third extendedaddressregisters. The DACproducesa current output, which U2040 converts to a voltage. U2045sumsan offsetvoltage,givinga voltagerangeof about *9 volts. This voltagerangeis greaterthan the rangeof the sweepramp. This fact, and the DAChav- ing twelvebits guaranteethat therewill be a twetvebit numberfor the DACfor each of the 1000digitalstorage points.

Sweep Control

U1025Ais the SweepState Controlflip-flop.When resetithe high at the Q(bar)outputturnsoff FET01062 and allows-theintegratorcapacitorsto charge. When the sweep state control ftip_flopis set, by a iow on pin 4, its Q(bar)goeslow. This switchesthe outputof corn_ parator U10608 so its output turns e1062 on and 9j:!!lln"" the timing capacitors. The e(bar)outputof U1025Aconnectsto pin 5 of Ut017A so this low switchesthe output pin 6 to its high impedancestate (its outputis open coltector)The. Q outpuiof U1025Ais high. Both U10t6A and U,t0168wheie previoustyset when the Q output was low. This staris lhe holdoff cycleor retracetime which is describedin detailfurther on.

The SweepStateControt-flip.flopUl025A,is set by a low out of NOR gate U2O20Awhen eitherthe EOS {end-of-sweep)orthe ABORT SWEEPtines go high. ABORTSWEEPis gen€ratedwhen a 1 is writtento b0 at address1F. The Sweep Controlflip-flopis reset by eithera triggersignalfrom multiplexerV2026or a hioh on the MNL or EXT SWp line. The microcorputlr writesto bits D2 and D3 at subaddress1 of address0F for the manualor externalsweepmode.

Theoryof Operation- 4g4Al4g4ApService,Vot..l

Trigger Control

Asweepis initiatedby the microcomputer,in single sweep or manual mode as noted abov€, or by one of three trigg€rsignatsselectedby the multiplexeiU2020. Oata bits D2 and D3 at addrEss0F.0 select the input trigger signals and rout€ tham to the clock input of U10168.Duringswe6ptimethg flipf,opU10168is set by a low on th€ Q outputof U1025A.

The high on the Q(bar)output of u1025A is atso applied through an inverter buffer in U1O17A. The resultantlow out dischargesholdoffcapacitorC3032at the inputto u30258. The outputof u30258 is tow so the output of NAND gate u1020D is high. Ftip-flop U10168requiresa high-to-lowtransitionto ctock any inputthrough. Sincelt is high,incomingtrigg€r signati will haveno efiecton the circuit.

At the end of sweep, the e(bar) output of U1025A goes low. This s\witchesthe output of U1017Ato its high impedancestate and tha holdoffcapacitor,CgOg2, starts to charge towards +15 volts through RgO30. When it reaches +5 volts the comparator output switcheshigh. This, along with a high on pin 13 of NANDgate U1020D,causesthe output to go low and the high-to-lowtransitionclocksU2026so the incoming lrigger signal can now clock U10168 and produce; high at the Q(bar)output. This is gatedthroughUZO26 to the input ot u2020c, so the output of the NoR gate will now reset the Sweep State Control flip-flop, U1025A,andstarta new sweep.

In the free-runmodethe multiplexerU2026,selects the +5 volts on pin 5. This high is clockedthroughto the sweep state control flip-flop immediatetyafter retrace. fncomingtrigger signalsare ignoredand the sweeprunsautomatically.

In singlesweep mode the sweepcircuit cannotbe re-triggereduntil it is armedby the microcomputer.Bit D0 is set highat subaddress0 of address0F (U1095-6). This appearsas a high on pin 2 of U4010A. Since U1016Ahas been set by the previoussweeprthe two highsat the input producea low at pin 13 of Ul020D. Therefore,incomingtriggersare disabted.The sweepis now in an idle stateand cannotrun untilthe microcom- puterarmsthe triggercircuitagain.This is doneby set_ ting bit D3 high at addresslF, which producesa high out of U1026pin 3 and clocks flip-flopUt0t6A. The resultantlow at pin 1 of u4010Aforcesa high at pin 11 of U1020D,and arms the triggercircuit. Thus a signal can nowtriggerthe sweepcircuitand the singtesweep cyclerepeats.

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