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Ethernet Media Access Controller (EMAC) Registers
5.23 Receive Maximum Length Register (RXMAXLEN)
The receive maximum length register (RXMAXLEN) is shown in Figure 49 and described in Table 48.
| Figure 49. Receive Maximum Length Register (RXMAXLEN) |
31 | 16 |
| Reserved |
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15 | 0 |
| RXMAXLEN |
LEGEND: R = Read only; R/W = Read/Write;
Table 48. Receive Maximum Length Register (RXMAXLEN) Field Descriptions
Bit | Field | Value | Description |
Reserved | 0 | Reserved | |
RXMAXLEN | Receive maximum frame length. These bits determine the maximum length of a received frame. | ||
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| The reset value is 5EEh (1518). Frames with byte counts greater than RXMAXLEN are long |
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| frames. Long frames with no errors are oversized frames. Long frames with CRC, code, or |
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| alignment error are jabber frames. |
5.24 Receive Buffer Offset Register (RXBUFFEROFFSET)
The receive buffer offset register (RXBUFFEROFFSET) is shown in Figure 50 and described in Table 49.
| Figure 50. Receive Buffer Offset Register (RXBUFFEROFFSET) |
31 | 16 |
| Reserved |
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15 | 0 |
RXBUFFEROFFSET
LEGEND: R = Read only; R/W = Read/Write;
Table 49. Receive Buffer Offset Register (RXBUFFEROFFSET) Field Descriptions
Bit | Field | Value | Description |
Reserved | 0 | Reserved | |
RXBUFFEROFFSET | Receive buffer offset value. These bits are written by the EMAC into each frame SOP | ||
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| buffer descriptor Buffer Offset field. The frame data begins after the RXBUFFEROFFSET |
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| value of bytes. A value of 0 indicates that there are no unused bytes at the beginning of |
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| the data, and that valid data begins on the first byte of the buffer. A value of Fh (15) |
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| indicates that the first 15 bytes of the buffer are to be ignored by the EMAC and that valid |
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| buffer data starts on byte 16 of the buffer. This value is used for all channels. |
SPRU941A
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