Texas Instruments TMS320DM643X DMP manual Emulation Control Register Emcontrol

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Ethernet Media Access Controller (EMAC) Registers

5.30 Emulation Control Register (EMCONTROL)

The emulation control register (EMCONTROL) is shown in Figure 56 and described in Table 55.

Figure 56. Emulation Control Register (EMCONTROL)

31			16
Reserved
R-0
15	2	1	0
Reserved		SOFT	FREE
R-0		R/W-0	R/W-0

LEGEND: R = Read only; R/W = Read/Write; -n= value after reset

Table 55. Emulation Control Register (EMCONTROL) Field Descriptions

Bit	Field	Value	Description
31-2	Reserved	0	Reserved
1	SOFT		Emulation soft bit. This bit is used in conjunction with FREE bit to determine the emulation suspend
			mode. This bit has no effect if FREE = 1.
		0	Soft mode is disabled. EMAC stops immediately during emulation halt.
		1	Soft mode is enabled. During emulation halt, EMAC stops after completion of current operation.
0	FREE		Emulation free bit. This bit is used in conjunction with SOFT bit to determine the emulation suspend
			mode.
		0	Free-running mode is disabled. During emulation halt, SOFT bit determines operation of EMAC.
		1	Free-running mode is enabled. During emulation halt, EMAC continues to operate.

5.31 FIFO Control Register (FIFOCONTROL)

The FIFO control register (FIFOCONTROL) is shown in Figure 57 and described in Table 56.

Figure 57. FIFO Control Register (FIFOCONTROL)

31			16
	Reserved
	R-0
15	2	1	0
Reserved		TXCELLTHRESH
R-0			R/W-2h

LEGEND: R = Read only; R/W = Read/Write; -n= value after reset

Table 56. FIFO Control Register (FIFOCONTROL) Field Descriptions

Bit	Field	Value	Description
31-2	Reserved	0	Reserved
1-0	TXCELLTHRESH	0-3h	Transmit FIFO cell threshold. Indicates the number of 64-byte packet cells required to be in the
			transmit FIFO before the packet transfer is initiated. Packets with fewer cells will be initiated when
			the complete packet is contained in the FIFO. The default value is 2, but 3 is also valid. 0 and 1 are
			not valid values.
		0-1h	Not a valid value.
		2h	Two 64-byte packet cells required to be in the transmit FIFO.
		3h	Three 64-byte packet cells required to be in the transmit FIFO.

98 Ethernet Media Access Controller (EMAC)/SPRU941A –April 2007

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