CY7C67200
Introduction
Processor Core Functional Overview
An overview of the processor core components are presented in this section.
Processor
Clocking
Memory
Table 1. Interface Options for GPIO Pins
Interrupts
General Timers and Watchdog Timer
Power Management
Interface Descriptions
•I2C EEPROM and OTG do not conflict with any interfaces
•HPI is mutually exclusive to HSS, SPI, and UART
| GPIO Pins | HPI | HSS | SPI | UART | I2C | OTG |
| GPIO31 |
|
|
|
| SCL/SDA |
|
| GPIO30 |
|
|
|
| SCL/SDA |
|
| GPIO29 |
|
|
|
|
| OTGID |
| GPIO24 | INT |
|
|
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|
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| GPIO23 | nRD |
|
|
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| GPIO22 | nWR |
|
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| GPIO21 | nCS |
|
|
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| GPIO20 | A1 |
|
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|
|
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| GPIO19 | A0 |
|
|
|
|
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| GPIO15 | D15 | CTS |
|
|
|
|
| GPIO14 | D14 | RTS |
|
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| GPIO13 | D13 | RXD |
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| GPIO12 | D12 | TXD |
|
|
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| GPIO11 | D11 |
| MOSI |
|
|
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| GPIO10 | D10 |
| SCK |
|
|
|
| GPIO9 | D9 |
| nSSI |
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| GPIO8 | D8 |
| MISO |
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| GPIO7 | D7 |
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| TX |
|
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| GPIO6 | D6 |
|
| RX |
|
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| GPIO5 | D5 |
|
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| GPIO4 | D4 |
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| GPIO3 | D3 |
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| GPIO2 | D2 |
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| GPIO1 | D1 |
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| GPIO0 | D0 |
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Document #: |
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| Page 2 of 78 |
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