SE0 | Cypress CY7C67200 manual

CY7C67200

Table 42. Register Summary (continued)

R/W	Address	Register	Bit 15	Bit 14	Bit 13	Bit 12	Bit 11	Bit 10	Bit 9	Bit 8	Default High
			Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0	Default Low
R/W	0xC090	Host 1 Status	VBUS	ID	Reserved				SOF/EOP	Reserved	xxxx xxxx
			Interrupt	Interrupt					Interrupt
			Flag	Flag					Flag
			Reserved	Port A	Reserved	Port A Con-	Reserved	Port A	Reserved	Done	xxxx xxxx
				Wake Interrupt		nect		SE0		Interrupt
				Flag		Change		Status		Flag
						Interrupt Flag
R/W	0xC090	Device 1 Status	VBUS	ID	Reserved				SOF/EOP	Reset	xxxx xxxx
			Interrupt	Interrupt					Interrupt	Interrupt
			Flag	Flag					Flag	Flag
			EP7	EP6	EP5	EP4	EP3	EP2	EP1	EP0	xxxx xxxx
			Interrupt	Interrupt	Interrupt	Interrupt	Interrupt	Interrupt	Interrupt	Interrupt
			Flag	Flag	Flag	Flag	Flag	Flag	Flag	Flag
R/W	0xC092	Host n SOF/EOP Count	Reserved		Count...						0010 1110
	0xC0B2
	0xC0B2		...Count								1110 0000
			...Count								1110 0000
R	0xC092	Device n Frame Number	SOF/EOP	SOF/EOP			Reserved	Frame...			0000 0000
	0xC0B2		Timeout	Timeout
			Flag	Interrupt Count
			...Frame								0000 0000
R	0xC094	Host n SOF/EOP Counter	Reserved		Counter...
	0xC0B4
	0xC0B4		...Counter
			...Counter
W	0xC094	Device n SOF/EOP Count	Reserved		Count...
	0xC0B4
	0xC0B4		...Count
			...Count
R	0xC096	Host n Frame	Reserved					Frame...			0000 0000
	0xC0B6
	0xC0B6		...Frame								0000 0000
			...Frame								0000 0000
R/W	0xC0AC	Host 2 Interrupt Enable	Reserved						SOF/EOP	Reserved	0000 0000
									Interrupt
									Enable
			Reserved	Port A	Reserved	Port A Con-	Reserved			Done	0000 0000
				Wake Interrupt		nect Change				Interrupt
				Enable		Interrupt				Enable
						Enable
R/W	0xC0AC	Device 2 Interrupt Enable	Reserved				SOF/EOP	Wake	SOF/EOP	Reset	0000 0000
							Timeout Inter-	Interrupt	Interrupt	Interrupt
							rupt Enable	Enable	Enable	Enable
			EP7	EP6	EP5	EP4	EP3	EP2	EP1	EP0	0000 0000
			Interrupt	Interrupt	Interrupt	Interrupt	Interrupt	Interrupt	Interrupt	Interrupt
			Enable	Enable	Enable	Enable	Enable	Enable	Enable	Enable
R/W	0xC0B0	Host 2 Status	Reserved						SOF/EOP	Reserved	xxxx xxxx
									Interrupt Flag
			Reserved	Port A	Reserved	Port A Con-	Reserved	Port A	Reserved	Done	xxxx xxxx
				Wake Interrupt		nect Change		SE0		Interrupt
				Flag		Interrupt Flag		Status		Flag
R/W	0xC0B0	Device 2 Status	Reserved				SOF/EOP	Wake	SOF/EOP	Reset	xxxx xxxx
							Timeout	Interrupt	Interrupt	Interrupt
							Interrupt	Flag	Flag	Flag
							Enable
			EP7	EP6	EP5	EP4	EP3	EP2	EP1	EP0	xxxx xxxx
			Interrupt Flag	Interrupt Flag	Interrupt Flag	Interrupt Flag	Interrupt Flag	Interrupt Flag	Interrupt Flag	Interrupt Flag
R/W	0xC0C6	HPI Mailbox	Message...								0000 0000
			...Message								0000 0000
R/W	0xC0C8	SPI Configuration	3Wire	Phase	SCK	Scale Select				Reserved	1000 0000
			Enable	Select	Polarity Select
			Master	Master	SS	SS Delay Select					0001 1111
			Active Enable	Enable	Enable
R/W	0xC0CA	SPI Control	SCK	FIFO	Byte	FullDuplex	SS	Read	Transmit	Receive	0000 0001
			Strobe	Init	Mode		Manual	Enable	Ready	Data Ready
			Transmit	Receive	Transmit Bit Length			Receive Bit Length			1000 0000
			Empty	Full
R/W	0xC0CC	SPI Interrupt Enable	Reserved...								0000 0000
			...Reserved					Receive	Transmit	Transfer	0000 0000
								Interrupt	Interrupt	Interrupt
								Enable	Enable	Enable
R	0xC0CE	SPI Status	Reserved...								0000 0000
			FIFO Error	Reserved				Receive	Transmit	Transfer	0000 0000
			Flag					Interrupt Flag	Interrupt Flag	Interrupt Flag
W	0xC0D0	SPI Interrupt Clear	Reserved...								0000 0000
			...Reserved						Transmit	Transmit	0000 0000
									Interrupt Clear	Interrupt Clear
R/W	0xC0D2	SPI CRC Control	CRC Mode		CRC Enable	CRC Clear	Receive CRC	One in CRC	Zero in CRC	Reserved...	0000 0000
			...Reserved								0000 0000
R/W	0xC0D4	SPI CRC Value	CRC..								1111 1111
			...CRC								1111 1111

Document #: 38-08014 Rev. *G

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Cypress CY7C67200 manual SE0

Contents

CY16 EZ-OTG FeaturesTypical Applications CY7C67200 Introduction Processor Core Functional OverviewInterface Descriptions OTG Interface USB Interface Pins Pin Name Pin NumberOTG Interface Pins Pin Name Pin Number USB Interface Serial Peripheral Interface I2C Eeprom Interface Pins Pin Name Pin NumberSPI Interface Pins Pin Name Pin Number HSS Interface Pins Pin Name Pin Number Charge Pump Interface HPI Interface Pins 1 Pin Name Pin NumberHost Port Interface HPI HPI Addressing HPI A10 Charge Pump Interface Pins Pin Name Pin Number Booster InterfaceCrystal Interface Pin Crystal Pins Pin Name Pin NumberBoot Configuration Interface Boot Mode Power Savings and Reset Description Power Savings Mode DescriptionSleep Memory Map Registers Hardware Revision Register 0xC004 R Bank Register 0xC002 R/WBank Register Example Hex Value Binary Value Reserved CPU Speed Definition Processor Speed CPU Speed Register 0xC008 R/W HSS Wake Enable Bit Host/Device 2 Wake Enable BitHost/Device 1 Wake Enable Bit OTG Wake Enable Bit Host/Device 2 Interrupt Enable Bit Halt Enable BitOTG Interrupt Enable Bit SPI Interrupt Enable Bit Timer 0 Interrupt Enable Bit Uart Interrupt Enable BitGpio Interrupt Enable Bit Timer 1 Interrupt Enable Bit LS Pull-up Enable Bit Port 2A Diagnostic Enable BitPort 1A Diagnostic Enable Bit Pull-down Enable Bit Reset Strobe Bit Timeout Flag BitLock Enable Bit WDT Enable Bit 0xC08A/0xC0AA Timer n Register R/WGeneral USB Registers USB Registers Register Name Address SIE1/SIE2 Resistors Function Select Enable Mode Select BitPort a Resistors Enable Bit USB Data Line Pull-up and Pull-down Resistors Mode Port n Arm Enable Bit Preamble Enable BitSync Enable Bit ISO Enable Bit Host n Address Register R/W Host n Count Register R/WHost 1 Count Register 0xC084 Host 2 Count Register 0xC0A4 NAK Flag Bit Error Flag BitUnderflow Flag Bit Stall Flag Bit PID Select ACK Flag BitHost n PID Register W PID Select Definition Host n Device Address Register W Host n Count Result Register R Port a Wake Interrupt Enable Bit Vbus Interrupt Enable BitID Interrupt Enable Bit SOF/EOP Interrupt Enable Bit Port a Wake Interrupt Flag Bit Vbus Interrupt Flag BitID Interrupt Flag Bit SOF/EOP Interrupt Flag Bit Host n SOF/EOP Count Register R/W Count Bits Count field sets the SOF/EOP counter durationHost n SOF/EOP Counter Register R Register Name Address Device 1/Device Host n Frame Register RUSB Device Only Registers Reserved USB Device Only Registers Enable Bit IN/OUT Ignore Enable BitStall Enable Bit NAK Interrupt Enable Bit Device n Endpoint n Count Register R/W Device n Endpoint n Address Register R/W OUT Exception Flag Bit Device n Endpoint n Status Register R/W Exception Flag Bit Setup Flag BitTimeout occurred Timeout condition did not occur Error occurred Error did not occur Device n Endpoint n Count Result Register Device n Endpoint n Count Result Register R/W EP7 Interrupt Enable Bit Device n Interrupt Enable Register R/WSOF/EOP Timeout Interrupt Enable Bit Reset Interrupt Enable Bit EP1 Interrupt Enable Bit EP5 Interrupt Enable Bit EP2 Interrupt Enable BitEP4 Interrupt Enable Bit EP3 Interrupt Enable Bit Device n Status Register R/W Device n Address Register W EP5 Interrupt Flag Bit Reset Interrupt Flag BitEP7 Interrupt Flag Bit EP6 Interrupt Flag Bit Device n SOF/EOP Count Register W SOF/EOP Timeout Flag BitSOF/EOP Timeout Interrupt Counter Bits Device n Frame Number Register R Vbus Discharge Enable Bit Vbus Pull-up Enable BitReceive Disable Bit Charge Pump Enable Bit Vbus Valid Flag Bit Write Protect Enable BitSAS Enable Bit Mode Select Definition Gpio Configuration 108 111 Reserved Interrupt 0 Polarity Select Bit HSS Enable BitSPI Enable Bit Interrupt 0 Enable Bit Gpio 0 Input Data Register 0xC020 R Gpio 1 Input Data Register 0xC026 RGpio 0 Direction Register 0xC022 R/W Gpio 1 Direction Register 0xC028 R/W HSS RegistersHSS Registers Register Name Address RTS Polarity Select Bit Xoff Enable BitCTS Enable Bit Receive Interrupt Enable Bit Receive Packet Ready Flag Bit Packet Mode Select BitTransmit Ready Bit Receive Overflow Flag Bit HSS Transmit Gap Register 0xC074 R/W Transmit Gap Select BitsHSS Data Register 0xC076 R/W HSS Receive Counter Register 0xC07A R/W HSS Receive Address Register 0xC078 R/W HPI Registers Register Name Address HSS Transmit Address Register 0xC07C R/WHSS Transmit Counter Register 0xC07E R/W HPI Registers HPI Breakpoint Register 0x0140 R Vbus to HPI Enable BitID to HPI Enable Bit SOF/EOP2 to HPI Enable Bit Reset2 to HPI Enable Bit SOF/EOP2 to CPU Enable BitSOF/EOP1 to HPI Enable Bit SOF/EOP1 to CPU Enable Bit HPI Mailbox Register 0xC0C6 R/W SIEXmsg Register WSIE1msg Register SIE2msg Register Data Bits SOF/EOP2 Flag Bit Reset2 Flag BitVbus Flag Bit ID Flag Bit SPI Registers Register Name Address SPI Registers Reset1 Flag BitDone1 Flag Bit Mailbox Out Flag Bit Master Enable Bit 3Wire Enable BitPhase Select Bit Master Active Enable Bit Fifo Init Bit Byte Mode BitRead Enable Bit SCK Strobe Bit Receive Bit Length Bits Transmit Interrupt Enable BitTransfer Interrupt Enable Bit Fifo Error Flag Bit Transmit Interrupt Clear Bit CRC Mode Definition CRCMode CRC PolynomialTransmit Interrupt Flag Bit Transfer Interrupt Flag Bit One in CRC Bit CRC Enable BitCRC Clear Bit Receive CRC Bit SPI Transmit Count Register 0xC0DA R/W SPI Transmit Address Register 0xC0D8 R/W Uart Registers Register Name Address SPI Receive Address Register 0xC0DC R/WSPI Receive Count Register 0xC0DE R/W Uart Registers Uart Baud Select Definition Baud Rate DIV8 = Uart Enable BitScale Select Bit Baud Select Bits Uart Data Register 0xC0E4 R/W Transmit Full Bit Pin Diagram Pin DescriptionsPin Descriptions Name Type A0 HPI A0 GPIO20 General Purpose IOA1 HPI A1 GPIO19 General Purpose IO Crystal Requirements XTALIN, Xtalout Booster Power Input 2.7V toAbsolute Maximum Ratings Operating Conditions DC Characteristics Reset Timing AC Timing Characteristics Clock Timing I2C Eeprom TimingParameter Description Min Typical Max Unit HPI Host Port Interface Write Cycle Timing Read Cycle Time Document # 38-08014 Rev. *G Data Access Time, from HPInRD fallingHPI Host Port Interface Read Cycle Timing Read Pulse Width HSS Byte Mode Transmit HSS Block Mode TransmitHSS Byte and Block Mode Receive Hssrts Hsscts Hardware CTS/RTS Handshake Register Summary Register Summary GPIO31 GPIO30 GPIO29 SE0 SOF/EOP2 Ball 7.00 mm x 7.00 mm x 1.2 mm Fbga BA48 Package DiagramOrdering Information Ordering Information Ordering Code Package Type PB-Free Document History Issue Orig. Description of Change Date